AT91SAM7X128B-AU Atmel, AT91SAM7X128B-AU Datasheet - Page 553
AT91SAM7X128B-AU
Manufacturer Part Number
AT91SAM7X128B-AU
Description
IC MCU 128KB FLASH 100LQFP
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7X128B-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
JTAG, SPI, UART
Maximum Clock Frequency
55 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AT91SAM7xxxxx
No. Of I/o's
62
Ram Memory Size
32KB
Cpu Speed
55MHz
No. Of Timers
1
Rohs Compliant
Yes
Cpu Family
91S
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
55MHz
Total Internal Ram Size
32KB
# I/os (max)
62
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7X128B-AU
Manufacturer:
Atmel
Quantity:
1 929
Part Number:
AT91SAM7X128B-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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36.8.16
Name:
Access Type:
These register fields are updated each time a message transfer is received or aborted.
MMI is cleared by reading the CAN_MSRx register.
MRDY, MABT are cleared by writing MTCR or MACR in the CAN_MCRx register.
Warning: MRTR and MDLC state depends partly on the mailbox object type.
• MTIMESTAMP: Timer value
This field is updated only when time-triggered operations are disabled (TTM cleared in CAN_MR register). If the TEOF field
in the CAN_MR register is cleared, TIMESTAMP is the internal timer value at the start of frame of the last message
received or sent by the mailbox. If the TEOF field in the CAN_MR register is set, TIMESTAMP is the internal timer value at
the end of frame of the last message received or sent by the mailbox.
In Time Triggered Mode, MTIMESTAMP is set to 0.
• MDLC: Mailbox Data Length Code
6120I–ATARM–06-Apr-11
MTIMESTAMP15 MTIMESTAMP14 MTIMESTAMP13 MTIMESTAMP12 MTIMESTAMP11 MTIMESTAMP10
MTIMESTAMP7
Mailbox Object Type
Receive
Receive with overwrite
Transmit
Consumer
Producer
MRDY
31
23
15
–
7
CAN Message Status Register
MTIMESTAMP6
MABT
30
22
14
Read-only
–
6
CAN_MSRx
MTIMESTAMP5
Description
Length of the first mailbox message received
Length of the last mailbox message received
No action
Length of the mailbox message received
Length of the mailbox message to be sent after the remote frame reception
29
21
13
–
–
5
MTIMESTAMP4
MRTR
28
20
12
–
4
SAM7X512/256/128 Preliminary
MTIMESTAMP3
27
19
11
–
3
MTIMESTAMP2
26
18
10
–
2
MDLC
MTIMESTAMP9
MTIMESTAMP1
25
17
–
9
1
MTIMESTAMP8
MTIMESTAMP0
MMI
24
16
8
0
553
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