AT32UC3A1128-AUT Atmel, AT32UC3A1128-AUT Datasheet - Page 617
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AT32UC3A1128-AUT
Manufacturer Part Number
AT32UC3A1128-AUT
Description
IC MCU AVR32 128KB FLASH 100TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A1128-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Controller Family/series
AT32UC3A
No. Of I/o's
69
Ram Memory Size
32KB
Cpu Speed
66MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, RS-485, SPI, USART
Maximum Clock Frequency
66 MHz
Number Of Programmable I/os
69
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105
Minimum Operating Temperature
- 40 C
Package
100TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
66 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (20Mb)
30.8.3.13
Offset:
Register Name:
Access Type:
Reset Value:
• RXINI: Received IN Data Interrupt Flag
Set by hardware when a new USB message is stored in the current bank of the Pipe. This triggers an interrupt if the RXINE
bit is set. Shall be cleared by software (by setting the RXINIC bit).
• TXOUTI: Transmitted OUT Data Interrupt Flag
Set by hardware when the current OUT bank is free and can be filled. This triggers an interrupt if the TXOUTE bit is set.
Shall be cleared by software (by setting the TXOUTIC bit).
• TXSTPI: Transmitted SETUP Interrupt Flag
For Control endpoints. Set by hardware when the current SETUP bank is free and can be filled. This triggers an interrupt if
the TXSTPE bit is set. Shall be cleared by software (by setting the TXSTPIC bit).
• UNDERFI: Underflow Interrupt Flag
Set by hardware when a transaction underflow occurs in the current isochronous or interrupt pipe. (the pipe can’t send the
OUT data packet in time because the current bank is not ready). A zero-length-packet (ZLP) will be send instead of. This
triggers an interrupt if the UNDERFLE bit is set. Shall be cleared by software (by setting the UNDERFIC bit).
• PERRI: Pipe Error Interrupt Flag
Set by hardware when an error occurs on the current bank of the Pipe. This triggers an interrupt if the PERRE bit is set.
Refers to the UPERRX register to determine the source of the error. Automatically cleared by hardware when the error
source bit is cleared.
• NAKEDI: NAKed Interrupt Flag
Set by hardware when a NAK has been received on the current bank of the Pipe. This triggers an interrupt if the NAKEDE
bit is set. Shall be cleared by software (by setting the NAKEDIC bit).
32058J–AVR32–04/11
PACKETI
SHORT
31
23
15
–
0
0
7
0
r
CURRBK
USB Pipe X Status Register (UPSTAX)
r
RXSTALLDI/
CRCERRI
30
22
14
0
0
0
6
0
r
PBYCT
r
OVERFI
29
21
13
0
0
0
5
0
r
0x0530 + X . 0x04
UPSTAX, X in [0..6]
Read-Only
0x00000000
NBUSYBK
r
NAKEDI
28
20
12
0
0
0
4
0
r
PBYCT
PERRI
27
19
11
0
–
–
3
0
r
r
UNDERFI
TXSTPI/
CFGOK
26
18
10
0
0
–
2
0
r
r
TXOUTI
25
17
0
–
9
0
1
0
r
AT32UC3A
DTSEQ
r
RWALL
RXINI
24
16
0
0
8
0
0
0
r
r
617
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