ATMEGA128-16MC Atmel, ATMEGA128-16MC Datasheet - Page 274

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ATMEGA128-16MC

Manufacturer Part Number
ATMEGA128-16MC
Description
IC AVR MCU 128K 16MHZ COM 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16MC

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Read-While-Write
Section – RWW
No Read-While-Write
Section – NRWW
274
ATmega128
section that is being programmed (erased or written), not which section that actually is being
read during a Boot Loader software update.
If a Boot Loader software update is programming a page inside the RWW section, it is possible
to read code from the Flash, but only code that is located in the NRWW section. During an on-
going programming, the software must ensure that the RWW section never is being read. If the
user software is trying to read code that is located inside the RWW section (i.e., by a
call/jmp/lpm or an interrupt) during programming, the software might end up in an unknown
state. To avoid this, the interrupts should either be disabled or moved to the Boot Loader Sec-
tion. The Boot Loader section is always located in the NRWW section. The RWW Section Busy
bit (RWWSB) in the Store Program Memory Control and Status Register (SPMCSR) will be read
as logical one as long as the RWW section is blocked for reading. After a programming is com-
pleted, the RWWSB must be cleared by software before reading code located in the RWW
section.
details on how to clear RWWSB.
The code located in the NRWW section can be read when the Boot Loader software is updating
a page in the RWW section. When the Boot Loader code updates the NRWW section, the CPU
is halted during the entire page erase or page write operation.
Table 107. Read-While-Write Features
Figure 132. Read-While-Write vs. No Read-While-Write
pointer Address During the
Which Section does the Z-
Programming?
NRWW section
See “Store Program Memory Control and Status Register – SPMCSR” on page 277.
RWW section
Z-pointer
Addresses RWW
Section
Code Located in
NRWW Section
Can be Read During
the Operation
Which Section can be
Programming?
NRWW section
Read During
Read-While-Write
No Read-While-Write
(RWW) Section
(NRWW) Section
None
Is the CPU
Halted?
Yes
No
Z-pointer
Addresses NRWW
Section
CPU is Halted
During the Operation
Read-While-
Supported?
Write
Yes
No
2467V–AVR–02/11
for

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