ATMEGA128-16MC Atmel, ATMEGA128-16MC Datasheet - Page 131

no-image

ATMEGA128-16MC

Manufacturer Part Number
ATMEGA128-16MC
Description
IC AVR MCU 128K 16MHZ COM 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16MC

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
2467V–AVR–02/11
Figure 57
frequency correct PWM mode the OCRnx Register is updated at BOTTOM. The timing diagrams
will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on.
The same renaming applies for modes that set the TOVn flag at BOTTOM.
Figure 57. Timer/Counter Timing Diagram, no Prescaling
Figure 58
Figure 58. Timer/Counter Timing Diagram, with Prescaler (f
(PC and PFC PWM)
(PC and PFC PWM)
and ICFn
and ICFn
(CTC and FPWM)
(CTC and FPWM)
(Update at TOP)
(Update at TOP)
TOVn
TOVn
TCNTn
TCNTn
OCRnx
TCNTn
TCNTn
OCRnx
as TOP)
as TOP)
(clk
(clk
shows the same timing data, but with the prescaler enabled.
clk
clk
shows the count sequence close to TOP in various modes. When using phase and
clk
clk
I/O
I/O
(FPWM)
(FPWM)
I/O
I/O
Tn
Tn
/1)
/8)
(if used
(if used
TOP - 1
TOP - 1
TOP - 1
TOP - 1
Old OCRnx Value
Old OCRnx Value
TOP
TOP
TOP
TOP
clk_I/O
BOTTOM
BOTTOM
/8)
TOP - 1
TOP - 1
New OCRnx Value
New OCRnx Value
ATmega128
BOTTOM + 1
BOTTOM + 1
TOP - 2
TOP - 2
131

Related parts for ATMEGA128-16MC