AT32UC3A364S-CTUR Atmel, AT32UC3A364S-CTUR Datasheet - Page 71
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AT32UC3A364S-CTUR
Manufacturer Part Number
AT32UC3A364S-CTUR
Description
IC MCU 64KB FLASH 144TFBGA
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3A364-CTUR.pdf
(75 pages)
Specifications of AT32UC3A364S-CTUR
Package / Case
144-TBGA
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
66MHz
Number Of I /o
110
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
128K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Core Size
32-Bit
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
2-Wire, I2S, JTAG, SPI, USART
Maximum Clock Frequency
66 MHz
Number Of Programmable I/os
23
Number Of Timers
4
Operating Supply Voltage
- 0.3 V to + 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
13.2.2
13.2.3
13.2.4
32072AS–AVR32–03/09
ADC
SPI
TWI
3. Exceptions when system stack is protected by MPU
4. Multiply instructions do not work on RevD.
1. Sleep Mode activation needs additional A to D conversion
1. SPI Bad Serial Clock Generation on 2nd chip_select when SCBR = 1, CPOL=1 and
2. SPI Disable does not work in Slave mode
1. TWIM Version Register is zero
When using the STCOND instruction, clear SREG[L] in the stacked value of SR before
returning from interrupts with RETE.
RETS behaves incorrectly when MPU is enabled and MPU is configured so that
system stack is not readable in unprivileged mode.
Fix/Workaround
Workaround 1: Make system stack readable in unprivileged mode,
or
Workaround 2: Return from supervisor mode using rete instead of rets. This requires :
1. Changing the mode bits from 001b to 110b before issuing the instruction.
Updating the mode bits to the desired value must be done using a single mtsr instruction so
it is done atomically. Even if this step is described in general as not safe in the UC technical
reference guide, it is safe in this very specific case.
2. Execute the RETE instruction.
All the multiply instructions do not work.
Fix/Workaround
Do not use the multiply instructions.
If the ADC sleep mode is activated when the ADC is idle the ADC will not enter sleep mode
before after the next AD conversion.
Fix/Workaround
Activate the sleep mode in the mode register and then perform an AD conversion.
NCPHA=0
When multiple CS are in use, if one of the baudrate equals to 1 and one of the others doesn't
equal to 1, and CPOL=1 and CPHA=0, then an additional pulse will be generated on SCK.
Fix/workaround
When multiple CS are in use, if one of the baudrate equals 1, the other must
also equal 1 if CPOL=1 and CPHA=0.
Fix/workaround
Read the last received data then perform a Software reset.
TWIM Version Register (VR) is zero instead of 0x100.
Fix/Workaround
None.
AT32UC3A3
71