AT90USB1287-MUR Atmel, AT90USB1287-MUR Datasheet - Page 310

• Manufacturer Part Number: AT90USB1287-MUR
• Description: MCU AVR 128K FLASH 16MHZ 64QFN
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB1287-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Processor Series: AT90USBx
• Core: AVR8
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525, ATAVRQTOUCHX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24. Analog Comparator
24.0.1
24.0.2
310
AT90USB64/128
ADC Control and Status Register B – ADCSRB
Analog Comparator Control and Status Register – ACSR
The Analog Comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator output, ACO, is set. The comparator’s output can be set to trigger
the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate
interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com-
parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is
shown in
The Power Reduction ADC bit, PRADC, in
must be disabled by writing a logical zero to be able to use the ADC input MUX.
Figure 24-1. Analog Comparator Block Diagram
Notes:
• Bit 6 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see
• Bit 7 – ACD: Analog Comparator Disable
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
ADC MULTIPLEXER
1. See
2. Refer to
Figure
REFERENCE
ACME
ADEN
BANDGAP
OUTPUT
placement.
7
–
R
0
7
ACD
R/W
0
Table 24-2 on page
(1)
24-1.
ACBG
Figure 1-1 on page 3
6
ACBG
R/W
0
6
ACME
R/W
0
“Analog Comparator Multiplexed Input” on page
5
ACO
R
N/A
5
–
R
0
312.
4
ACI
R/W
0
and
4
–
R
0
Table 10-6 on page 80
“Power Reduction Register 0 - PRR0” on page 54
3
ACIE
R/W
0
3
-
R
0
(2)
2
ACIC
R/W
0
2
ADTS2
R/W
0
1
ACIS1
0
R/W
1
ADTS1
R/W
0
for Analog Comparator pin
0
R/W
0
ACIS0
0
ADTS0
R/W
0
312.
ACSR
ADCSRB
7593K–AVR–11/09