AT90USB1287-MUR Atmel, AT90USB1287-MUR Datasheet - Page 263

• Manufacturer Part Number: AT90USB1287-MUR
• Description: MCU AVR 128K FLASH 16MHZ 64QFN
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB1287-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Processor Series: AT90USBx
• Core: AVR8
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525, ATAVRQTOUCHX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7593K–AVR–11/09
Set by hardware when the controller is in FULL-SPEED mode. Cleared by hardware when the
controller is in LOW-SPEED mode.
• 2 – Reserved
The value read from this bit is always 0. Do not set this bit.
• 1 – ID: IUD pin Flag
The value read from this bit indicates the state of the UID pin.
• 0 – VBUS: VBus Flag
The value read from this bit indicates the state of the VBUS pin. This bit can be used in device
mode to monitor the USB bus connection state of the appication. See Section 21.10, page 259
for more details.
7-2 - Reserved
The value read from these bits is always 0. Do not set these bits.
1 – IDTI: D Transition Interrupt Flag
Set by hardware when a transition (high to low, low to high) has been detected on the UID pin.
Shall be cleared by software.
• 0 – VBUSTI: IVBUS Transition Interrupt Flag
Set by hardware when a transition (high to low, low to high) has been detected on the VBUS
pad.
Shall be cleared by software.
• 7-6 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 5 – HNPREQ: HNP Request Bit
Set to initiate the HNP when the controller is in the Device mode (B). Set to accept the HNP
when the controller is in the Host mode (A).
Clear otherwise.
• 4 – SRPREQ: SRP Request Bit
Set to initiate the SRP when the controller is in Device mode. Cleared by hardware when the
controller is initiating a SRP.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R
7
0
-
R
7
0
-
R
6
0
-
HNPREQ
R
6
0
R/W
-
5
0
SRPREQ
R
5
0
-
R/W
4
0
SRPSEL
R
4
0
-
R/W
3
0
VBUSHWC
R
3
0
-
R/W
2
0
R
2
0
-
VBUSREQ
R/W
1
0
AT90USB64/128
IDTI
R/W
1
0
VBUSRQC
R/W
VBUSTI
0
0
R/W
0
0
OTGCON
USBINT
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