AT90USB1287-MUR Atmel, AT90USB1287-MUR Datasheet - Page 304

MCU AVR 128K FLASH 16MHZ 64QFN

AT90USB1287-MUR

Manufacturer Part Number
AT90USB1287-MUR
Description
MCU AVR 128K FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet

Specifications of AT90USB1287-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
AT90USBx
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525, ATAVRQTOUCHX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
304
AT90USB64/128
- 00: 1 bank
- 01: 2 banks
- 10: invalid
- 11: invalid
• ALLOC
Configure Pipe Memory
Set to configure the pipe memory with the characteristics.
Clear to update the memory allocation. Refer to the Memory Management chapter for more
details.
7 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 7 - INTFRQ7:0 - Interrupt Pipe Request Frequency
These bits are the maximum value in millisecond of the polling period for an Interrupt Pipe.
This value has no effect for a non-Interrupt Pipe.
• 7 - CFGOK - Configure Pipe Memory OK
Set by hardware if the required memory configuration has been successfully performed.
Cleared by hardware when the pipe is disabled. The USB reset and the reset pipe have no effect
on the configuration of the pipe.
• 6 - OVERFI - Overflow
Set by hardware when a the current Pipe has received more data than the maximum length of
the current Pipe. An interrupt is triggered if the FLERRE bit is set.
Shall be cleared by software. Setting by software has no effect.
• 5 - UNDERFI - Underflow
Set by hardware when a transaction underflow occurs in the current isochronous or interrupt
Pipe. The Pipe can’t send the data flow required by the device. A ZLP will be sent instead. An
interrupt is triggered if the FLERRE bit is set.
Shall be cleared by software. Setting by software has no effect.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
INTFRQ7
CFGOK
RW
R
7
0
7
0
INTFRQ6
OVERFI
RW
RW
6
0
6
0
INTFRQ5
UNDERFI
RW
RW
5
0
5
0
INTFRQ4
RW
4
0
4
0
-
INTFRQ3
RW
R
3
0
3
0
DTSEQ1:0
INTFRQ2
RW
R
2
0
2
0
INTFRQ1
RW
R
1
0
1
0
NBUSYBK
INTFRQ0 UPCFG2X
RW
R
7593K–AVR–11/09
0
0
0
0
UPSTAX

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