ATMEGA64-16AUR Atmel, ATMEGA64-16AUR Datasheet - Page 239

• Manufacturer Part Number: ATMEGA64-16AUR
• Description: MCU AVR 64KB FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64-16AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Analog Noise
Canceling Techniques
Offset Compensation
Schemes
ADC Accuracy
Definitions
2490Q–AVR–06/10
Digital circuitry inside and outside the device generates EMI which might affect the accuracy of
analog measurements. If conversion accuracy is critical, the noise level can be reduced by
applying the following techniques:
Figure 116. ADC Power Connections
The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea-
surements as much as possible. The remaining offset in the analog path can be measured
directly by selecting the same channel for both differential inputs. This offset residue can be then
subtracted in software from the measurement results. Using this kind of software based offset
correction, offset on any channel can be reduced below one LSB.
An n-bit single-ended ADC converts a voltage linearly between GND and V
(LSBs). The lowest code is read as 0, and the highest code is read as 2
Several parameters describe the deviation from the ideal behavior:
•
1. Keep analog signal paths as short as possible. Make sure analog tracks run over the
2. The AVCC pin on the device should be connected to the digital V
3. Use the ADC noise canceler function to reduce induced noise from the CPU.
4. If any ADC port pins are used as digital outputs, it is essential that these do not
Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition
(at 0.5 LSB). Ideal value: 0 LSB.
ground plane, and keep them well away from high-speed switching digital tracks.
via an LC network as shown in
switch while a conversion is in progress.
100 nF
(ADC7) PF7
(ADC6) PF6
(ADC5) PF5
(ADC4) PF4
(ADC3) PF3
(ADC2) PF2
(ADC1) PF1
(ADC0) PF0
(AD0) PA0
Figure
AREF
AVCC
GND
GND
VCC
116.
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52
53
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57
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59
60
61
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62
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63
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64
64
1
ATmega64(L)
n
CC
- 1.
supply voltage
REF
in 2
n
steps
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