ATMEGA64-16AUR Atmel, ATMEGA64-16AUR Datasheet - Page 145

• Manufacturer Part Number: ATMEGA64-16AUR
• Description: MCU AVR 64KB FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64-16AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SFIOR – Special
Function IO Register
2490Q–AVR–06/10
tem clock frequency (f
sampling, the maximum frequency of an external clock it can detect is half the sampling fre-
quency (Nyquist sampling theorem). However, due to variation of the system clock frequency
and duty cycle caused by Oscillator source (crystal, resonator, and capacitors) tolerances, it is
recommended that maximum frequency of an external clock source is less than f
An external clock source can not be prescaled.
Figure 60. Prescaler for Timer/Counter1, Timer/Counter2, and Timer/Counter3
Note:
• Bit 7 – TSM: Timer/Counter Synchronization Mode
Writing TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the
value that is written to PSR0 and PSR321 bits is kept, hence keeping the corresponding pres-
caler reset signals asserted. This ensures that the corresponding Timer/Counters are halted and
can be configured to the same value without the risk of one of them advancing during configura-
tion. When the TSM bit written zero, the PSR0 and PSR321 bits are cleared by hardware, and
the Timer/Counters start counting simultaneously.
• Bit 0 – PSR321: Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1
When this bit is one, the Timer/Counter3, Timer/Counter2, and Timer/Counter1 prescaler will be
reset. The bit is normally cleared immediately by hardware, except if the TSM bit is set. Note that
Timer/Counter3 Timer/Counter2, and Timer/Counter1 share the same prescaler and a reset of
this prescaler will affect all three timers.
Bit
0x20 (0x40)
Read/Write
Initial Value
T3
CS30
CS32
CS31
1. The synchronization logic on the input pins (T3/T2/T1) is shown in
TSM
R/W
TIMER/COUNTER3 CLOCK SOURCE
7
0
0
PSR321
CK
ExtClk
clk
T3
R
6
–
0
< f
clk_I/O
R
5
–
0
T2
/2) given a 50/50% duty cycle. Since the edge detector uses
CS20
CS22
CS21
R
4
–
0
Clear
TIMER/COUNTER2 CLOCK SOURCE
0
ACME
R/W
10-BIT T/C PRESCALER
3
0
clk
T2
PUD
R/W
2
0
T1
CS10
CS12
CS11
PSR0
R/W
1
0
ATmega64(L)
Figure
TIMER/COUNTER1 CLOCK SOURCE
PSR321
0
R/W
0
0
59.
clk
(1)
clk_I/O
T1
SFIOR
/2.5.
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