AT90USB646-AUR Atmel, AT90USB646-AUR Datasheet - Page 86

• Manufacturer Part Number: AT90USB646-AUR
• Description: MCU AVR 64K FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB646-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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AT90USB64/128
Table 10-13. Overriding Signals for Alternate Functions PD7..PD4
Table 10-14. Overriding Signals for Alternate Functions in PD3..PD0
Note:
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
1. When enabled, the 2-wire Serial Interface enables Slew-Rate controls on the output pins PD0
and PD1. This is not shown in this table. In addition, spike filters are connected between the
AIO outputs shown in the port figure and the digital logic of the TWI module.
PD3/INT3/TXD1
TXEN1
0
TXEN1
1
TXEN1
TXD1
INT3 ENABLE
1
INT3 INPUT
–
PD7/T0
0
0
0
0
0
0
0
0
T0 INPUT
–
PD6/T1
0
0
0
0
0
0
0
0
T1 INPUT
–
PD2/INT2/RXD1
RXEN1
PORTD2 • PUD
RXEN1
0
0
0
INT2 ENABLE
1
INT2 INPUT/RXD1
–
PD5/XCK1
0
0
XCK1 OUTPUT ENABLE
1
XCK1 OUTPUT ENABLE
XCK1 OUTPUT
0
0
XCK1 INPUT
–
PD1/INT1/SDA/
OC2B
TWEN
PORTD1 • PUD
TWEN
SDA_OUT
TWEN | OC2B
ENABLE
OC2B
1
SDA INPUT
INT1 ENABLE
INT1 INPUT
(1)
PD0/INT0/SCL/
OC0B
TWEN
PORTD0 • PUD
TWEN
SCL_OUT
TWEN | OC0B
ENABLE
OC0B
INT0 ENABLE
1
INT0 INPUT
SCL INPUT
PD4/ICP1
0
0
0
0
0
0
0
0
ICP1 INPUT
–
7593K–AVR–11/09