AT90USB646-AUR Atmel, AT90USB646-AUR Datasheet - Page 24

• Manufacturer Part Number: AT90USB646-AUR
• Description: MCU AVR 64K FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB646-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.3.2
5.3.3
5.3.4
24
AT90USB64/128
The EEPROM Address Register – EEARH and EEARL
The EEPROM Data Register – EEDR
The EEPROM Control Register – EECR
• Bits 15..12 – Res: Reserved Bits
These bits are reserved bits in the AT90USB64/128 and will always read as zero.
• Bits 11..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 4K
bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 4096.
The initial value of EEAR is undefined. A proper value must be written before the EEPROM may
be accessed.
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7..6 – Res: Reserved Bits
These bits are reserved bits in the AT90USB64/128 and will always read as zero.
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEPE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in
is set, any write to EEPMn will be ignored. During reset, the EEPMn bits will be reset to 0b00
unless the EEPROM is busy programming.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
15
–
EEAR7
7
R
R/W
0
X
7
MSB
R/W
0
7
–
R
0
14
–
EEAR6
6
R
R/W
0
X
6
R/W
0
6
–
R
0
13
–
EEAR5
5
R
R/W
0
X
5
R/W
0
5
EEPM1
R/W
X
12
–
EEAR4
4
R
R/W
0
X
4
R/W
0
4
EEPM0
R/W
X
11
EEAR11
EEAR3
3
R/W
R/W
X
X
3
R/W
0
3
EERIE
R/W
0
2
R/W
0
2
EEMPE
R/W
0
10
EEAR10
EEAR2
2
R/W
R/W
X
X
1
0
R/W
1
X
EEPE
R/W
9
EEAR9
EEAR1
1
R/W
R/W
X
X
0
LSB
R/W
0
0
EERE
R/W
0
8
EEAR8
EEAR0
0
R/W
R/W
X
X
Table
5-2. While EEPE
EEDR
EECR
EEARH
EEARL
7593K–AVR–11/09