PIC18F2331-E/SP Microchip Technology, PIC18F2331-E/SP Datasheet - Page 87
![IC MCU FLASH 4KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F2331-E/SP
Manufacturer Part Number
PIC18F2331-E/SP
Description
IC MCU FLASH 4KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18F4331-EP.pdf
(400 pages)
Specifications of PIC18F2331-E/SP
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164035 - MODULE SKT FOR 18F2X31 28SOICDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18F4331-EP PDF datasheet #7
- Current page: 87 of 400
- Download datasheet (7Mb)
EXAMPLE 6-3:
6.5.2
Depending on the application, good programming
practice may dictate that the value written to the
memory should be verified against the original value.
This should be used in applications where excessive
writes can stress bits near the specification limit.
6.5.3
If a write is terminated by an unplanned event, such as
loss of power or an unexpected Reset, the memory
location just programmed should be verified and
TABLE 6-2:
© 2007 Microchip Technology Inc.
TBLPTRU
TBPLTRH Program Memory Table Pointer High Byte (TBLPTR<15:8>)
TBLPTRL Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
TABLAT
INTCON
EECON2 EEPROM Control Register 2 (not a physical register)
EECON1
IPR2
PIR2
PIE2
Legend:
Note 1:
PROGRAM_MEMORY
Name
Program Memory Table Latch
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIP
OSCFIE
x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used during Flash/EEPROM access.
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
OSCFIF
EEPGD
WRITE VERIFY
UNEXPECTED TERMINATION OF
WRITE OPERATION
Bit 7
—
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
BSF
DECFSZ COUNTER_HI
GOTO
BCF
REGISTERS ASSOCIATED WITH PROGRAM FLASH MEMORY
WRITING TO FLASH PROGRAM MEMORY (CONTINUED)
CFGS
Bit 6
INTCON, GIE
55h
EECON2
0AAh
EECON2
EECON1, WR
INTCON, GIE
PROGRAM_LOOP
EECON1, WREN
—
—
—
—
bit 21
Bit 5
—
—
—
—
(1)
Program Memory Table Pointer Upper Byte (TBLPTR<20:16>) --00 0000 --00 0000
INT0IE
FREE
EEIP
EEIE
Bit 4
EEIF
PIC18F2331/2431/4331/4431
Preliminary
WRERR
; disable interrupts
; required sequence
; write 55H
; write 0AAH
; start program (CPU stall)
; re-enable interrupts
; loop until done
; disable write to memory
RBIE
Bit 3
—
—
—
TMR0IF
WREN
LVDIP
LVDIE
LVDIF
Bit 2
reprogrammed if needed. The WRERR bit is set when
a write operation is interrupted by a MCLR Reset, or a
WDT Time-out Reset during normal operation. In these
situations, users can check the WRERR bit and rewrite
the location.
6.6
See Section 22.5 “Program Verification and Code
Protection” for details on code protection of Flash
program memory.
Flash Program Operation During
Code Protection
INT0IF
Bit 1
WR
—
—
—
CCP2IP
CCP2IE
CCP2IF
RBIF
Bit 0
RD
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 000x 0000 000u
0000 0000 0000 0000
xx-0 x000 uu-0 u000
1--1 -1-1 1--1 -1-1
0--0 -0-0 0--0 -0-0
0--0 -0-0 0--0 -0-0
POR, BOR
Value on:
DS39616C-page 85
Value on
all other
Resets
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