PIC18F2331-E/SP Microchip Technology, PIC18F2331-E/SP Datasheet - Page 120

IC MCU FLASH 4KX16 28-DIP

PIC18F2331-E/SP

Manufacturer Part Number
PIC18F2331-E/SP
Description
IC MCU FLASH 4KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2331-E/SP

Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164035 - MODULE SKT FOR 18F2X31 28SOICDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC18F2331/2431/4331/4431
FIGURE 10-12:
DS39616C-page 118
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (INTCON2<7>).
PGC
Enable Debug
From other
RB7:RB4 pins
Set RBIF
(2)
or ICSP™
2: PGC is available on RB6.
3: PGD is available on RB7.
/PGD
(3)
Data Bus
WR LATB
or PORTB
WR TRISB
BLOCK DIAGRAM OF RB7:RB6
RD PORTB
D
D
TRIS Latch
Data Latch
RD TRISB
RD LATB
CK
CK
Enable Debug or ICSP™
RBPU
Q
Q
Q
Q
(1)
Q
Preliminary
EN
D
RD PORTB
Q
Enable
Debug
0
RBx
1
Q3
EN
D
0
TRISBx
Q1
1
TTL
Input
Buffer
Enable
Debug
V
P
DD
Weak
Pull-up
© 2007 Microchip Technology Inc.
Schmitt
Trigger
RB7/RB6 Pin

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