PIC18F2331-E/SP Microchip Technology, PIC18F2331-E/SP Datasheet - Page 40
![IC MCU FLASH 4KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F2331-E/SP
Manufacturer Part Number
PIC18F2331-E/SP
Description
IC MCU FLASH 4KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18F4331-EP.pdf
(400 pages)
Specifications of PIC18F2331-E/SP
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164035 - MODULE SKT FOR 18F2X31 28SOICDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18F4331-EP PDF datasheet #7
- Current page: 40 of 400
- Download datasheet (7Mb)
PIC18F2331/2431/4331/4431
3.3.2
In SEC_IDLE mode, the CPU is disabled, but the
peripherals continue to be clocked from the Timer1
oscillator. This mode is entered by setting the Idle bit,
modifying SCS1:SCS0 = 01 and executing a SLEEP
instruction. When the clock source is switched (see
Figure 3-5) to the Timer1 oscillator, the primary
oscillator is shut down, the OSTS bit is cleared and the
T1RUN bit is set.
FIGURE 3-5:
FIGURE 3-6:
DS39616C-page 38
Peripheral
Note:
Program
Counter
T1OSI
OSC1
Clock
Clock
Note 1: T
CPU
CPU Clock
PLL Clock
Peripheral
Program
Counter
Output
T1OSI
OSC1
Clock
SEC_IDLE MODE
The Timer1 oscillator should already be
running prior to entering SEC_IDLE mode.
If the T1OSCEN bit is not set when the
SLEEP instruction is executed, a forced
NOP will be executed instead and entry to
SEC_IDLE mode will not occur. If the
Timer1 oscillator is enabled, but not yet
running, peripheral clocks will be delayed
until the oscillator has started; in such sit-
uations, initial oscillator operation is far
from stable and unpredictable operation
may result.
Q1
Wake from Interrupt Event
Q2
OST
PC
Q3
= 1024 T
PC
Q4
TIMING TRANSITION FOR ENTRY TO SEC_IDLE MODE
TIMING TRANSITION FOR WAKE FROM SEC_RUN MODE (HSPLL)
Q1
OSC
Q1
1
T
; T
OST (1)
PLL
2
= 2 ms (approx). These intervals are not shown to scale.
Q2
PC + 2
3
T
PLL
OSTS bit Set
Clock Transition
Q3
(1)
4
Preliminary
5
Q4
PC + 2
6
Q1
1
2
7
When a wake event occurs, the peripherals continue to
be clocked from the Timer1 oscillator. After a 10 μs
delay following the wake event, the CPU begins execut-
ing code, being clocked by the Timer1 oscillator. The
microcontroller operates in SEC_RUN mode until the
primary clock becomes ready. When the primary clock
becomes ready, a clock switch back to the primary clock
occurs (see Figure 3-6). When the clock switch is com-
plete, the T1RUN bit is cleared, the OSTS bit is set and
the primary clock is providing the system clock. The
IDLEN and SCS bits are not affected by the wake-up;
the Timer1 oscillator continues to run.
Clock Transition
3
8
4
5
PC + 4
6
7
8
© 2007 Microchip Technology Inc.
Q2
Q3 Q4
Q1
PC + 6
Q2
Q3
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