AT90USB162-16MU Atmel, AT90USB162-16MU Datasheet - Page 83

• Manufacturer Part Number: AT90USB162-16MU
• Description: MCU AVR USB 16K FLASH 32-QFN
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB162-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, PS/2, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFN
• Controller Family/series: AVR USB
• No. Of I/o's: 22
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• Processor Series: AT90USBx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART, debugWIRE
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATSTK526, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK526 - KIT STARTER FOR AT90USB82/162ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

External Interrupt Flag
Register – EIFR
Pin Change Interrupt
Control Register -
PCICR
Pin Change Interrupt
Flag Register – PCIFR
Pin Change Mask
Register 0 – PCMSK0
Pin Change Mask
Register 1– PCMSK1
7707A–AVR–01/07
• Bits 7..0 – INTF7 - INTF0: External Interrupt Flags 7 - 0
When an edge or logic change on the INT7:0 pin triggers an interrupt request, INTF7:0 becomes
set (one). If the I-bit in SREG and the corresponding interrupt enable bit, INT7:0 in EIMSK, are
set (one), the MCU will jump to the interrupt vector. The flag is cleared when the interrupt routine
is executed. Alternatively, the flag can be cleared by writing a logical one to it. These flags are
always cleared when INT7:0 are configured as level interrupt. Note that when entering sleep
mode with the INT3:0 interrupts disabled, the input buffers on these pins will be disabled. This
may cause a logic change in internal signals which will set the INTF3:0 flags. See “Digital Input
Enable and Sleep Modes” on page 68 for more information.
• Bit 1..0 – PCIE1- PCIE0: Pin Change Interrupt Enable 1-0
When the PCIE1/0 bit is set (one) and the I-bit in the Status Register (SREG) is set (one), Pin
Change interrupt 1/0 is enabled. Any change on any enabled PCINT12..8/7..0 pin will cause an
interrupt. The corresponding interrupt of Pin Change Interrupt Request is executed from the
PCI1/0 Interrupt Vector. PCINT12..8/7..0 pins are enabled individually by the PCMSK1/0
Register.
• Bit 1..0 – PCIF1- PCIF0: Pin Change Interrupt Flag 1-0
When a logic change on any PCINT12..8/7..0 pin triggers an interrupt request, PCIF1/0
becomes set (one). If the I-bit in SREG and the PCIE1/0 bit in EIMSK are set (one), the MCU will
jump to the corresponding Interrupt Vector. The flag is cleared when the interrupt routine is exe-
cuted. Alternatively, the flag can be cleared by writing a logical one to it.
• Bit 7..0 – PCINT7..0: Pin Change Enable Mask 7..0
Each PCINT7..0 bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT7..0 is set and the PCIE0 bit in PCICR is set, pin change interrupt is enabled on the
corresponding I/O pin. If PCINT7..0 is cleared, pin change interrupt on the corresponding I/O pin
is disabled.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
7
PCINT7
R/W
0
7
7
INTF7
R/W
0
7
-
R
0
7
-
R
0
6
PCINT6
R/W
0
6
6
INTF6
R/W
0
6
-
R
0
6
-
R
0
5
PCINT5
R/W
0
5
5
INTF5
R/W
0
5
–
R
0
5
–
R
0
4
R/W
0
4
PCINT4
4
INTF4
R/W
0
4
–
R
0
4
–
R
0
3
INTF3
R/W
0
3
PCINT3
R/W
0
3
3
–
R
0
3
–
R
0
2
INTF2
R/W
0
2
PCINT2
R/W
0
2
2
–
R
0
2
–
R
0
1
INTF1
R/W
0
1
PCIE1
R/W
0
1
PCIF1
R/W
0
1
PCINT1
R/W
0
1
0
INTF0
R/W
0
0
PCIE0
R/W
0
0
PCIF0
R/W
0
0
PCINT0
R/W
0
0
EIFR
PCICR
PCIFR
PCMSK0
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