AT90USB162-16MU Atmel, AT90USB162-16MU Datasheet - Page 132

• Manufacturer Part Number: AT90USB162-16MU
• Description: MCU AVR USB 16K FLASH 32-QFN
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB162-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, PS/2, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFN
• Controller Family/series: AVR USB
• No. Of I/o's: 22
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• Processor Series: AT90USBx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART, debugWIRE
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATSTK526, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK526 - KIT STARTER FOR AT90USB82/162ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Output Compare
Register 1 A –
OCR1AH and OCR1AL
Output Compare
Register 1 B –
OCR1BH and OCR1BL
Output Compare
Register 1 C –
OCR1CH and OCR1CL
Input Capture Register
1 – ICR1H and ICR1L
Timer/Counter1
Interrupt Mask
Register – TIMSK1
132
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers. See “Accessing 16-bit Registers” on page 106.
IThe Input Capture is updated with the counter (TCNTn) value each time an event occurs on the
ICPn pin (or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture
can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit
registers. See “Accessing 16-bit Registers” on page 106.
• Bit 5 – ICIEn: Timer/Countern, Input Capture Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Countern Input Capture interrupt is enabled. The corresponding Interrupt
Vector (See “Interrupts” on page 61.) is executed when the ICFn Flag, located in TIFRn, is set.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
7
OCR1A[15:8]
OCR1A[7:0]
R/W
0
7
OCR1B[15:8]
OCR1B[7:0]
R/W
0
7
OCR1C[15:8]
OCR1C[7:0]
R/W
0
7
ICR1[15:8]
ICR1[7:0]
R/W
0
7
–
R
0
6
R/W
0
6
R/W
0
6
R/W
0
6
R/W
0
6
–
R
0
5
R/W
0
5
R/W
0
5
R/W
0
5
R/W
0
5
ICIE1
R/W
0
4
R/W
0
4
R/W
0
4
R/W
0
4
R/W
0
4
–
R
0
3
R/W
0
3
R/W
0
3
R/W
0
3
R/W
0
3
OCIE1
C
R/W
0
2
R/W
0
2
R/W
0
2
R/W
0
2
R/W
0
2
OCIE1B
R/W
0
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
1
OCIE1A
R/W
0
0
R/W
0
0
R/W
0
0
R/W
0
0
R/W
0
0
TOIE1
R/W
0
OCR1AH
OCR1AL
OCR1BH
OCR1BL
OCR1CH
OCR1CL
ICR1H
ICR1L
TIMSK1
7707A–AVR–01/07