ATMEGA32U4-AUR Atmel, ATMEGA32U4-AUR Datasheet - Page 135
![MCU AVR 16K FLASH 16MHZ 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA32U4-AUR
Manufacturer Part Number
ATMEGA32U4-AUR
Description
MCU AVR 16K FLASH 16MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16U4-MU.pdf
(433 pages)
Specifications of ATMEGA32U4-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
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14.10.12 Output Compare Register 3 A – OCR3AH and OCR3AL
14.10.13 Output Compare Register 3 B – OCR3BH and OCR3BL
14.10.14 Output Compare Register 3 C – OCR3CH and OCR3CL
14.10.15 Input Capture Register 1 – ICR1H and ICR1L
14.10.16 Input Capture Register 3 – ICR3H and ICR3L
7766F–AVR–11/10
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers.
The Input Capture is updated with the counter (TCNTn) value each time an event occurs on the
ICPn pin (or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture
can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit
registers.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
See “Accessing 16-bit Registers” on page 110.
7
R/W
0
7
R/W
0
7
R/W
0
7
R/W
0
7
R/W
0
See “Accessing 16-bit Registers” on page 110.
6
R/W
0
6
R/W
0
6
R/W
0
6
R/W
0
6
R/W
0
5
R/W
0
5
R/W
0
5
R/W
0
5
R/W
0
5
R/W
0
4
R/W
0
4
R/W
0
4
R/W
0
4
R/W
0
4
R/W
0
OCR3A[15:8]
OCR3B[15:8]
OCR3C[15:8]
OCR3A[7:0]
OCR3B[7:0]
OCR3C[7:0]
ICR1[15:8]
ICR3[15:8]
ICR1[7:0]
ICR3[7:0]
3
0
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
R/W
2
R/W
0
2
R/W
0
2
R/W
0
2
R/W
0
2
R/W
0
1
R/W
0
1
R/W
0
1
R/W
0
1
R/W
0
1
R/W
0
ATmega16/32U4
0
R/W
0
0
R/W
0
0
R/W
0
0
R/W
0
0
R/W
0
OCR3AH
OCR3AL
OCR3BH
OCR3BL
OCR3CH
OCR3CL
ICR1H
ICR1L
ICR3H
ICR3L
135
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