PIC16F1947-I/PT Microchip Technology, PIC16F1947-I/PT Datasheet - Page 59

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PIC16F1947-I/PT

Manufacturer Part Number
PIC16F1947-I/PT
Description
IC MCU 8BIT FLASH 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1947-I/PT

Core Size
8-Bit
Program Memory Size
28KB (16K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC16F
Eeprom Memory Size
256Byte
Ram Memory Size
1024Byte
Cpu Speed
32MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
54
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 17 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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4.2
Code protection allows the device to be protected from
unauthorized access. Program memory protection and
data EEPROM protection are controlled independently.
Internal access to the program memory and data
EEPROM are unaffected by any code protection
setting.
4.2.1
The entire program memory space is protected from
external reads and writes by the CP bit in Configuration
Word 1. When CP = 0, external reads and writes of
program memory are inhibited and a read will return all
‘0’s. The CPU can continue to read program memory,
regardless of the protection bit settings. Writing the
program memory is dependent upon the write
protection
Protection”
4.2.2
The entire data EEPROM is protected from external
reads and writes by the CPD bit. When CPD = 0,
external reads and writes of data EEPROM are
inhibited. The CPU can continue to read and write data
EEPROM regardless of the protection bit settings.
4.3
Write protection allows the device to be protected from
unintended
bootloader software, can be protected while allowing
other regions of the program memory to be modified.
The WRT<1:0> bits in Configuration Word 2 define the
size of the program memory block that is protected.
4.4
Four memory locations (8000h-8003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
readable and writable during normal execution. See
Section 4.5 “Device ID and Revision ID”
information on accessing these memory locations. For
more information on checksum calculation, see the
“PIC16F193X/LF193X/PIC16F194X/LF194X Memory
Programming Specification” (DS41397).
 2010 Microchip Technology Inc.
Code Protection
Write Protection
User ID
PROGRAM MEMORY PROTECTION
DATA EEPROM PROTECTION
for more information.
setting.
self-writes.
See
Applications,
Section 4.3
such
for more
“Write
Preliminary
as
PIC16F/LF1946/47
DS41414B-page 59

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