DSPIC30F2011-20E/ML Microchip Technology, DSPIC30F2011-20E/ML Datasheet - Page 202
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DSPIC30F2011-20E/ML
Manufacturer Part Number
DSPIC30F2011-20E/ML
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(26 pages)
Specifications of DSPIC30F2011-20E/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
For Use With
DAF30-4 - DEVICE ATP FOR ICE4000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
dsPIC30F2011/2012/3012/3013
DC Characteristics ............................................................ 150
Development Support ....................................................... 145
Device Configuration
Device Configuration Registers
Device Overview ........................................................... 11, 19
Disabling the UART........................................................... 107
Divide Support..................................................................... 22
DSP Engine......................................................................... 23
Dual Output Compare Match Mode .................................... 88
E
Electrical Characteristics
Enabling and Setting Up UART
Enabling the UART ........................................................... 107
Equations
Errata .................................................................................... 9
Exception Sequence
External Clock Timing Characteristics
External Clock Timing Requirements................................ 161
External Interrupt Requests ................................................ 70
F
Fast Context Saving............................................................ 70
Flash Program Memory....................................................... 49
I
I/O Pin Specifications
DS70139G-page 202
Erasing, Word ............................................................. 56
Protection Against Spurious Write .............................. 58
Reading....................................................................... 55
Write Verify ................................................................. 58
Writing ......................................................................... 57
Writing, Block .............................................................. 57
Writing, Word .............................................................. 57
BOR .......................................................................... 158
Brown-out Reset ....................................................... 158
I/O Pin Input Specifications ....................................... 156
I/O Pin Output Specifications .................................... 156
Idle Current (I
Low-Voltage Detect................................................... 157
LVDL ......................................................................... 157
Operating Current (I
Power-Down Current (I
Program and EEPROM............................................. 159
Temperature and Voltage Specifications .................. 150
Register Map............................................................. 136
FBORPOR ................................................................ 134
FGS........................................................................... 134
FOSC ........................................................................ 134
FWDT........................................................................ 134
Instructions (Table) ..................................................... 22
Multiplier...................................................................... 25
Continuous Pulse Mode .............................................. 88
Single Pulse Mode ...................................................... 88
AC ............................................................................. 160
DC ............................................................................. 150
Alternate I/O .............................................................. 107
Setting Up Data, Parity and Stop Bit Selections ....... 107
ADC Conversion Clock ............................................. 115
Baud Rate ................................................................. 109
Serial Clock Rate ...................................................... 102
Trap Sources .............................................................. 67
Type A, B and C Timer ............................................. 167
Type A Timer ............................................................ 167
Type B Timer ............................................................ 168
Type C Timer ............................................................ 168
IDLE
) .................................................... 153
DD
)............................................. 152
PD
) ........................................ 154
I/O Ports.............................................................................. 59
I
I
I
I
I
Idle Current (I
In-Circuit Serial Programming (ICSP)......................... 49, 123
Input Capture (CAPX) Timing Characteristics .................. 169
Input Capture Module ......................................................... 83
Input Capture Operation During Sleep and Idle Modes...... 84
Input Capture Timing Requirements................................. 169
Input Change Notification Module....................................... 63
Instruction Addressing Modes ............................................ 43
Instruction Set
Internal Clock Timing Examples ....................................... 163
Internet Address ............................................................... 205
2
2
2
2
2
C 10-bit Slave Mode Operation........................................ 99
C 7-bit Slave Mode Operation.......................................... 99
C Master Mode Operation.............................................. 101
C Master Mode Support ................................................. 101
C Module
Input.......................................................................... 156
Output ....................................................................... 156
Parallel (PIO) .............................................................. 59
Reception ................................................................. 100
Transmission ............................................................ 100
Reception ................................................................... 99
Transmission .............................................................. 99
Baud Rate Generator ............................................... 102
Clock Arbitration ....................................................... 102
Multi-Master Communication,
Reception ................................................................. 102
Transmission ............................................................ 101
Addresses................................................................... 99
Bus Data Timing Characteristics
Bus Data Timing Requirements
Bus Start/Stop Bits Timing Characteristics
General Call Address Support .................................. 101
Interrupts .................................................................. 101
IPMI Support............................................................. 101
Operating Function Description .................................. 97
Operation During CPU Sleep and Idle Modes .......... 102
Pin Configuration ........................................................ 97
Programmer’s Model .................................................. 97
Register Map ............................................................ 103
Registers .................................................................... 97
Slope Control ............................................................ 101
Software Controlled Clock Stretching (STREN = 1) . 100
Various Modes............................................................ 97
Interrupts .................................................................... 84
Register Map .............................................................. 85
CPU Idle Mode ........................................................... 84
CPU Sleep Mode ........................................................ 84
dsPIC30F2012/3013 Register Map (Bits 7-0)............. 63
File Register Instructions ............................................ 43
Fundamental Modes Supported ................................. 43
MAC Instructions ........................................................ 44
MCU Instructions ........................................................ 43
Move and Accumulator Instructions............................ 44
Other Instructions ....................................................... 44
Overview................................................................... 140
Summary .................................................................. 137
Bus Collision and Bus Arbitration ..................... 102
Master Mode..................................................... 177
Slave Mode....................................................... 179
Master Mode..................................................... 178
Slave Mode....................................................... 179
Master Mode..................................................... 177
Slave Mode....................................................... 179
IDLE
) ............................................................ 153
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