ATMEGA32A-MUR Atmel, ATMEGA32A-MUR Datasheet - Page 264
![MCU AVR 32KB FLASH 16MHZ 44QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA32A-MUR
Manufacturer Part Number
ATMEGA32A-MUR
Description
MCU AVR 32KB FLASH 16MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA32A-MU.pdf
(353 pages)
Specifications of ATMEGA32A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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25.8.13
8155C–AVR–02/11
Boot Loader Parameters
In
ming are given.
Table 25-6.
Note:
Table 25-7.
Note:
Table 25-8.
Note:
BOOTSZ1
1
1
0
0
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
Table 25-6
1. The different BOOTSZ Fuse configurations are shown in
1. For details about these two section, see
1. Z15: always ignored
253
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See
Z-pointer during Self-Programming.
BOOTSZ0
1
0
1
0
through
Boot Size Configuration
Read-While-Write Limit
Explanation of Different Variables used in
pointer
and
“Addressing the Flash during Self-Programming” on page 257
PC[13:6]
PC[5:0]
“RWW – Read-While-Write Section” on page 253
13
5
Table
Boot
Size
256
words
512
words
1024
words
2048
words
Corresponding
25-8, the parameters used in the description of the self program-
Z-value
Z14:Z7
Z6:Z1
Z14
Pages
4
8
16
32
Z6
(1)
(1)
(1)
Application
Flash
Section
$0000 -
$3EFF
$0000 -
$3DFF
$0000 -
$3BFF
$0000 -
$37FF
Program Counter page address: Page select, for
Description
Most significant bit in the Program Counter. (The
Program Counter is 14 bits PC[13:0])
Most significant bit which is used to address the
words within one page (64 words in a page requires
6 bits PC [5:0]).
Bit in Z-register that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB equals
PAGEMSB + 1.
page erase and page write
Program Counter word address: Word select, for
filling temporary buffer (must be zero during page
write operation)
“NRWW – No Read-While-Write Section” on page
Figure 25-3
Boot
Loader
Flash
Section
$3F00 -
$3FFF
$3E00 -
$3FFF
$3C00 -
$3FFF
$3800 -
$3FFF
Pages
224
Figure 25-2
32
End
Application
section
$3EFF
$3DFF
$3BFF
$37FF
and the Mapping to the Z-
for details about the use of
Address
$0000 - $37FF
$3800 - $3FFF
ATmega32A
Boot Reset
Address (start
Boot Loader
Section)
$3F00
$3E00
$3C00
$3800
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