ATMEGA32A-MUR Atmel, ATMEGA32A-MUR Datasheet - Page 187
![MCU AVR 32KB FLASH 16MHZ 44QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA32A-MUR
Manufacturer Part Number
ATMEGA32A-MUR
Description
MCU AVR 32KB FLASH 16MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA32A-MU.pdf
(353 pages)
Specifications of ATMEGA32A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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20.7
8155C–AVR–02/11
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Assembly code example
ldi
out
wait1:
in
sbrs r16,TWINT
rjmp wait1
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
ldi
out
wait2:
in
sbrs r16,TWINT
rjmp wait2
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
ldi
out
wait3:
in
sbrs r16,TWINT
rjmp wait3
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
Transmission Modes
r16, (1<<TWINT)|(1<<TWSTA)|
(1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, START
r16, SLA_W
TWDR, r16
r16, (1<<TWINT) | (1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, MT_SLA_ACK
r16, DATA
TWDR, r16
r16, (1<<TWINT) | (1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, MT_DATA_ACK
r16, (1<<TWINT)|(1<<TWEN)|
(1<<TWSTO)
TWCR, r16
The TWI can operate in one of four major modes. These are named Master Transmitter (MT),
Master Receiver (MR), Slave Transmitter (ST) and Slave Receiver (SR). Several of these
modes can be used in the same application. As an example, the TWI can use MT mode to write
data into a TWI EEPROM, MR mode to read the data back from the EEPROM. If other masters
are present in the system, some of these might transmit data to the TWI, and then SR mode
would be used. It is the application software that decides which modes are legal.
C example
TWCR = (1<<TWINT)|(1<<TWSTA)|
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != START)
TWDR = SLA_W;
TWCR = (1<<TWINT) | (1<<TWEN);
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != MT_SLA_ACK)
TWDR = DATA;
TWCR = (1<<TWINT) | (1<<TWEN);
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != MT_DATA_ACK)
TWCR = (1<<TWINT)|(1<<TWEN)|
(1<<TWEN)
(1<<TWSTO);
;
ERROR();
;
ERROR();
;
ERROR();
Comments
Send START condition
Wait for TWINT Flag set. This indicates
that the START condition has been
transmitted
Check value of TWI Status Register. Mask
prescaler bits. If status different from
START go to ERROR
Load SLA_W into TWDR Register. Clear
TWINT bit in TWCR to start transmission
of address
Wait for TWINT Flag set. This indicates
that the SLA+W has been transmitted,
and ACK/NACK has been received.
Check value of TWI Status Register. Mask
prescaler bits. If status different from
MT_SLA_ACK go to ERROR
Load DATA into TWDR Register. Clear
TWINT bit in TWCR to start transmission
of data
Wait for TWINT Flag set. This indicates
that the DATA has been transmitted, and
ACK/NACK has been received.
Check value of TWI Status Register. Mask
prescaler bits. If status different from
MT_DATA_ACK go to ERROR
Transmit STOP condition
ATmega32A
187
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