ATMEGA32A-MUR Atmel, ATMEGA32A-MUR Datasheet - Page 26
![MCU AVR 32KB FLASH 16MHZ 44QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA32A-MUR
Manufacturer Part Number
ATMEGA32A-MUR
Description
MCU AVR 32KB FLASH 16MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA32A-MU.pdf
(353 pages)
Specifications of ATMEGA32A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8.1.3
8.1.4
8.1.5
8.2
8.3
8155C–AVR–02/11
Clock Sources
Default Clock Source
Flash Clock – clk
Asynchronous Timer Clock – clk
ADC Clock – clk
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
The Asynchronous Timer clock allows the Asynchronous Timer/Counter to be clocked directly
from an external 32kHz clock crystal. The dedicated clock domain allows using this Timer/Coun-
ter as a real-time counter even when the device is in sleep mode.
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O clocks
in order to reduce noise generated by digital circuitry. This gives more accurate ADC conversion
results.
The device has the following clock source options, selectable by Flash Fuse bits as shown
below. The clock from the selected source is input to the AVR clock generator, and routed to the
appropriate modules.
Table 8-1.
Note:
The various choices for each clocking option is given in the following sections. When the CPU
wakes up from Power-down or Power-save, the selected clock source is used to time the start-
up, ensuring stable Oscillator operation before instruction execution starts. When the CPU starts
from Reset, there is as an additional delay allowing the power to reach a stable level before
commencing normal operation. The Watchdog Oscillator is used for timing this real-time part of
the start-up time. The number of WDT Oscillator cycles used for each time-out is shown in
8-2. The frequency of the Watchdog Oscillator is voltage dependent as shown in
mary” on page
Table 8-2.
The device is shipped with CKSEL = “0001” and SUT = “10”. The default clock source setting is
therefore the 1MHz Internal RC Oscillator with longest startup time. This default setting ensures
that all users can make their desired clock source setting using an In-System or Parallel
Programmer.
ADC
Device Clocking Option
External Crystal/Ceramic Resonator
External Low-frequency Crystal
External RC Oscillator
Calibrated Internal RC Oscillator
External Clock
FLASH
Typ Time-out (V
1. For all fuses “1” means unprogrammed while “0” means programmed.
4.1ms
65ms
Device Clocking Options Select
Number of Watchdog Oscillator Cycles
335.
ASY
CC
= 5.0V)
Typ Time-out (V
(1)
4.3ms
69ms
CC
= 3.0V)
ATmega32A
Number of Cycles
64K (65,536)
4K (4,096)
1111 - 1010
1000 - 0101
0100 - 0001
CKSEL3:0
1001
0000
“Register Sum-
Table
26
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