PIC18F65J15T-I/PT Microchip Technology, PIC18F65J15T-I/PT Datasheet - Page 54

• Manufacturer Part Number: PIC18F65J15T-I/PT
• Description: IC PIC MCU FLASH 24KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J15T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18F65J15T-I/PT; PIC18F65J15T-I/PTTR

PIC18F87J10 FAMILY
5.6
Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. The other registers are forced to a “Reset
state” depending on the type of Reset that occurred.
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal
operation. Status bits from the RCON register, RI, TO,
PD, POR and BOR, are set or cleared differently in
different Reset situations, as indicated in Table 5-1.
These bits are used in software to determine the nature
of the Reset.
TABLE 5-1:
DS39663F-page 52
Power-on Reset
RESET Instruction
Brown-out
MCLR during power-managed
Run modes
MCLR during power-managed
Idle modes and Sleep mode
WDT time-out during full-power
or power-managed Run modes
MCLR during full-power
execution
Stack Full Reset (STVREN = 1)
Stack Underflow Reset
(STVREN = 1)
Stack Underflow Error (not an
actual Reset, STVREN = 0)
WDT time-out during
power-managed Idle or Sleep
modes
Interrupt exit from
power-managed modes
Legend: u = unchanged
Note 1:
Reset State of Registers
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (0008h or 0018h).
Condition
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
Counter
Program
PC + 2
PC + 2
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
(1)
RI
1
0
1
u
u
u
u
u
u
u
u
u
TO
1
u
1
1
1
0
u
u
u
u
0
u
RCON Register
Table 5-2 describes the Reset states for all of the
Special Function Registers. These are categorized by
Power-on and Brown-out Resets, Master Clear and
WDT Resets and WDT wake-ups.
PD
1
u
1
u
0
u
u
u
u
u
0
0
POR
0
u
u
u
u
u
u
u
u
u
u
u
BOR
© 2009 Microchip Technology Inc.
0
u
0
u
u
u
u
u
u
u
u
u
STKFUL
STKPTR Register
0
u
u
u
u
u
u
1
u
u
u
u
STKUNF
0
u
u
u
u
u
u
u
1
1
u
u