PIC18F65J15T-I/PT Microchip Technology, PIC18F65J15T-I/PT Datasheet - Page 18

• Manufacturer Part Number: PIC18F65J15T-I/PT
• Description: IC PIC MCU FLASH 24KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J15T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18F65J15T-I/PT; PIC18F65J15T-I/PTTR

PIC18F87J10 FAMILY
TABLE 1-3:
DS39663F-page 16
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
RG4/CCP5/P1D
V
V
AV
AV
ENVREG
V
Legend: TTL
Note 1:
SS
DD
DDCORE
SS
DD
RG0
ECCP3
P3A
RG1
TX2
CK2
RG2
RX2
DT2
RG3
CCP4
P3D
RG4
CCP5
P1D
V
V
DDCORE
CAP
2:
Pin Name
/V
ST
I
P
I
Default assignment for ECCP2/P2A when Configuration bit, CCP2MX, is set.
Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared.
CAP
2
C/SMB = I
PIC18F6XJ10/6XJ15 PINOUT I/O DESCRIPTIONS (CONTINUED)
= Schmitt Trigger input with CMOS levels
= Input
= Power
= TTL compatible input
2
C™/SMBus input buffer
Pin Number
9, 25, 41, 56
26, 38, 57
TQFP
20
19
18
10
3
4
5
6
8
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
P
P
P
P
P
P
I
I
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
—
—
—
PORTG is a bidirectional I/O port.
Ground reference for logic and I/O pins.
Positive supply for peripheral digital logic and I/O pins.
Ground reference for analog modules.
Positive supply for analog modules.
Enable for on-chip voltage regulator.
Core logic power or external filter capacitor connection.
Digital I/O.
Capture 3 input/Compare 3 output/PWM 3 output.
ECCP3 PWM output A.
Digital I/O.
EUSART2 asynchronous transmit.
EUSART2 synchronous clock (see related RX2/DT2).
Digital I/O.
EUSART2 asynchronous receive.
EUSART2 synchronous data (see related TX2/CK2).
Digital I/O.
Capture 4 input/Compare 4 output/PWM 4 output.
ECCP3 PWM output D.
Digital I/O.
Capture 5 input/Compare 5 output/PWM 5 output.
ECCP1 PWM output D.
Positive supply for microcontroller core logic
(regulator disabled).
External filter capacitor connection (regulator enabled).
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
© 2009 Microchip Technology Inc.
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