ATMEGA16U2-MU Atmel, ATMEGA16U2-MU Datasheet - Page 171

• Manufacturer Part Number: ATMEGA16U2-MU
• Description: MCU AVR 16K FLASH USB 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16U2-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Core: AVR8
• Processor Series: ATMEGA16x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 16 MHz
• Data Ram Size: 1.25 KB
• Data Rom Size: 512 B
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Mounting Style: SMD/SMT
• Height: 0.95 mm
• Interface Type: SPI, UART
• Length: 5 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 5 mm
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

18.11.5
18.11.6
18.12 Examples of Baud Rate Setting
7799D–AVR–11/10
UCSRnD – USART Control and Status Register n D
UBRRnL and UBRRnH – USART Baud Rate Registers
• Bits 1 – CTSEN : USART CTS Enable
Set this bit to one by firmware to enable the transmission flow control (CTS). Transmission is
allowed if CTS = 0.
Set this bit to zero by firmware to disable the transmission flow control (CTS). Transmission is
always allowed.
• Bits 0 – RTSEN : USART RTS Enable
Set this bit to one by firmware to enable the receive flow control (RTS).
Set this bit to zero by firmware to disable the receive flow control (RTS).
• Bit 15:12 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRH is written.
• Bit 11:0 – UBRR[11:0]: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRH contains the four
most significant bits, and the UBRRL contains the eight least significant bits of the USART baud
rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud rate is
changed. Writing UBRRL will trigger an immediate update of the baud rate prescaler.
For standard crystal and resonator frequencies, the most commonly used baud rates for asyn-
chronous operation can be generated by using the UBRR settings in
UBRR values which yield an actual baud rate differing less than 0.5% from the target baud rate,
are bold in the table. Higher error ratings are acceptable, but the Receiver will have less noise
resistance when the error ratings are high, especially for large serial frames (see
Operational Range” on page
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R/W
7
0
-
R/W
15
R
–
7
0
0
R/W
R/W
14
R
–
6
0
0
Error[%]
6
0
-
163). The error values are calculated using the following equation:
R/W
13
=
R/W
R
–
5
0
0
5
0
-
⎛
⎝
BaudRate
------------------------------------------------------- - 1
R/W
BaudRate
R/W
12
R
–
4
0
0
4
0
-
UBRR[7:0]
Closest Match
ATmega8U2/16U2/32U2
R/W
R/W
R/W
11
3
0
3
0
0
-
–
⎞
⎠
R/W
R/W
R/W
10
2
0
•
-
2
0
0
UBRR[11:8]
100%
Table 18-9
CTSEN
R/W
R/W
R/W
1
0
9
1
0
0
RTSEN
R/W
R/W
R/W
8
0
0
0
to
“Asynchronous
0
0
Table
UBRRnH
UBRRnL
UCSRnD
18-12.
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