ATMEGA16U2-MU Atmel, ATMEGA16U2-MU Datasheet - Page 105

• Manufacturer Part Number: ATMEGA16U2-MU
• Description: MCU AVR 16K FLASH USB 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16U2-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Core: AVR8
• Processor Series: ATMEGA16x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 16 MHz
• Data Ram Size: 1.25 KB
• Data Rom Size: 512 B
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Mounting Style: SMD/SMT
• Height: 0.95 mm
• Interface Type: SPI, UART
• Length: 5 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 5 mm
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

15.9.2
7799D–AVR–11/10
TCCR0B – Timer/Counter Control Register B
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is
changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a
strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the
forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0B output is
changed according to its COM0B[1:0] bits setting. Note that the FOC0B bit is implemented as a
strobe. Therefore it is the value present in the COM0B[1:0] bits that determines the effect of the
forced compare.
A FOC0B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0B as TOP.
The FOC0B bit is always read as zero.
• Bits 5:4 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bit 3 – WGM02: Waveform Generation Mode
See the description in the
• Bits 2:0 – CS0[2:0]: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 15-9.
Bit
0x25 (0x45)
Read/Write
Initial Value
CS02
0
0
0
0
CS01
0
0
1
1
Clock Select Bit Description
FOC0A
W
7
0
CS00
0
1
0
1
FOC0B
“TCCR0A – Timer/Counter Control Register A” on page
W
6
0
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
I/O
I/O
I/O
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
5
–
R
0
4
–
R
0
ATmega8U2/16U2/32U2
WGM02
R/W
3
0
CS02
R/W
2
0
CS01
R/W
1
0
CS00
R/W
0
0
102.
TCCR0B
105