PIC16F886-E/SP Microchip Technology, PIC16F886-E/SP Datasheet - Page 279

• Manufacturer Part Number: PIC16F886-E/SP
• Description: IC PIC MCU FLASH 8KX14 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F886-E/SP

• Program Memory Type: FLASH
• Program Memory Size: 14KB (8K x 14)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: MSSP/EUSART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164123, DM164120-3, DV164122
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM164123 - KIT MANAGEMENT SYSTEM PICDEMDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

F
Fail-Safe Clock Monitor....................................................... 71
Firmware Instructions........................................................ 225
Flash Program Memory .................................................... 111
Fuses. See Configuration Bits
G
General Call Address Support .......................................... 188
General Purpose Register File............................................ 22
I
I
I
I
I
© 2007 Microchip Technology Inc.
2
2
2
2
C (MSSP Module)
C Master Mode Reception.............................................. 194
C Master Mode Repeated Start Condition Timing.......... 193
C Module
Associated Registers
Asynchronous Mode ................................................. 151
Baud Rate Generator (BRG)
Synchronous Master Mode ............................... 169, 173
Synchronous Slave Mode
Fail-Safe Condition Clearing ....................................... 71
Fail-Safe Detection ..................................................... 71
Fail-Safe Operation..................................................... 71
Reset or Wake-up from Sleep..................................... 71
Writing....................................................................... 117
ACK Pulse......................................................... 185, 186
Addressing ................................................................ 186
Read/Write Bit Information (R/W Bit) ........................ 186
Reception.................................................................. 186
Serial Clock (RC3/SCK/SCL).................................... 186
Slave Mode ............................................................... 185
Transmission............................................................. 186
Acknowledge Sequence Timing................................ 197
Baud Rate Generator................................................ 191
BRG Block Diagram.................................................. 191
BRG Reset Due to SDA Arbitration During
BRG Timing .............................................................. 191
Bus Collision
Baud Rate Generator........................................ 161
12-bit Break Transmit and Receive .................. 167
Associated Registers
Auto-Wake-up on Break ................................... 166
Baud Rate Generator (BRG) ............................ 161
Clock Accuracy ................................................. 158
Receiver............................................................ 154
Setting up 9-bit Mode with Address Detect....... 156
Transmitter........................................................ 151
Auto Baud Rate Detect ..................................... 165
Baud Rate Error, Calculating ............................ 161
Baud Rates, Asynchronous Modes .................. 162
Formulas ........................................................... 161
High Baud Rate Select (BRGH Bit) .................. 161
Associated Registers
Reception.......................................................... 171
Transmission .................................................... 169
Associated Registers
Reception.......................................................... 174
Transmission .................................................... 173
Start Condition .................................................. 201
Receive..................................................... 157
Transmit.................................................... 153
Receive..................................................... 172
Transmit.................................................... 170
Receive..................................................... 174
Transmit.................................................... 173
PIC16F882/883/884/886/887
Preliminary
ID Locations...................................................................... 223
In-Circuit Debugger........................................................... 224
In-Circuit Serial Programming (ICSP)............................... 223
Indirect Addressing, INDF and FSR registers..................... 37
Instruction Format............................................................. 225
Instruction Set................................................................... 225
Bus Collision timing .................................................. 199
Clock Arbitration ....................................................... 198
Clock Arbitration Timing (Master Transmit) .............. 198
Effect of a Reset ....................................................... 198
General Call Address Support .................................. 188
Master Mode............................................................. 189
Master Mode 7-bit Reception Timing........................ 196
Master Mode Operation............................................ 190
Master Mode Start Condition Timing ........................ 192
Master Mode Support ............................................... 189
Master Mode Transmission ...................................... 194
Master Mode Transmit Sequence ............................ 190
Multi-Master Mode.................................................... 199
Repeat Start Condition Timing Waveform ................ 193
Sleep Operation........................................................ 198
Stop Condition Receive or Transmit Timing ............. 198
Stop Condition Timing .............................................. 197
Waveforms for 7-bit Reception ................................. 187
Waveforms for 7-bit Transmission............................ 187
ADDLW..................................................................... 227
ADDWF .................................................................... 227
ANDLW..................................................................... 227
ANDWF .................................................................... 227
BCF .......................................................................... 227
BSF........................................................................... 227
BTFSC...................................................................... 227
BTFSS ...................................................................... 228
CALL......................................................................... 228
CLRF ........................................................................ 228
CLRW ....................................................................... 228
CLRWDT .................................................................. 228
COMF ....................................................................... 228
DECF........................................................................ 228
DECFSZ ................................................................... 229
GOTO ....................................................................... 229
INCF ......................................................................... 229
INCFSZ..................................................................... 229
IORLW ...................................................................... 229
IORWF...................................................................... 229
MOVF ....................................................................... 230
MOVLW .................................................................... 230
MOVWF.................................................................... 230
NOP.......................................................................... 230
RETFIE..................................................................... 231
RETLW ..................................................................... 231
RETURN................................................................... 231
RLF........................................................................... 232
RRF .......................................................................... 232
SLEEP ...................................................................... 232
SUBLW..................................................................... 232
Acknowledge .................................................... 199
Repeated Start Condition ................................. 202
Repeated Start Condition Timing (Case1)........ 202
Repeated Start Condition Timing (Case2)........ 202
Start Condition.................................................. 200
Start Condition Timing .............................. 200, 201
Stop Condition .................................................. 203
Stop Condition Timing (Case 1) ....................... 203
Stop Condition Timing (Case 2) ....................... 203
DS41291D-page 277