PIC16F886-E/SP Microchip Technology, PIC16F886-E/SP Datasheet - Page 220

IC PIC MCU FLASH 8KX14 28DIP

PIC16F886-E/SP

Manufacturer Part Number
PIC16F886-E/SP
Description
IC PIC MCU FLASH 8KX14 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F886-E/SP

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164123, DM164120-3, DV164122
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM164123 - KIT MANAGEMENT SYSTEM PICDEMDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F886-E/SP
Manufacturer:
Microchip Technology
Quantity:
135
PIC16F882/883/884/886/887
FIGURE 14-8:
TABLE 14-6:
DS41291D-page 218
INTCON
PIE1
PIE2
PIR1
PIR2
Legend:
INSTRUCTION FLOW
GIE bit
(INTCON<7>)
INTF flag
(INTCON<1>)
CLKOUT
INT pin
Name
OSC1
Note 1: INTF flag is sampled here (every Q1).
Instruction
Executed
Instruction
Fetched
PC
2: Asynchronous interrupt latency = 3-4 T
3: CLKOUT is available only in INTOSC and RC Oscillator modes.
4: For minimum width of INT pulse, refer to AC specifications in Section 17.0 “Electrical Specifications”.
5: INTF is enabled to be set any time during the Q4-Q1 cycles.
x = unknown, u = unchanged, — = unimplemented read as ‘0’, q = value depends upon condition.
Shaded cells are not used by the Interrupt module.
(3)
is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
OSFIE
OSFIF
Bit 7
GIE
SUMMARY OF INTERRUPT REGISTERS
Q1
Inst (PC – 1)
Inst (PC)
(1)
INT PIN INTERRUPT TIMING
Q2
PC
PEIE
ADIE
C2IE
ADIF
Bit 6
C2IF
(4)
Q3
Q4
(5)
RCIE
RCIF
Bit 5
C1IE
C1IF
T0IE
Q1
Inst (PC + 1)
Inst (PC)
Q2
(1)
INTE
EEIE
Bit 4
TXIE
TXIF
EEIF
PC + 1
Q3
CY
. Synchronous latency = 3 T
Preliminary
Q4
SSPIE
BCLIE
SSPIF
BCLIF
RBIE
Bit 3
Interrupt Latency
Q1
Dummy Cycle
ULPWUIE
ULPWUIF
Q2
CCP1IE
CCP1IF
PC + 1
Bit 2
T0IF
Q3
Q4
(2)
TMR2IE
TMR2IF
Bit 1
INTF
CY
, where T
Q1
Dummy Cycle
Inst (0004h)
Q2
TMR1IE
CCP2IE
TMR1IF
CCP2IF
0004h
Bit 0
RBIF
CY
= instruction cycle time. Latency
Q3
© 2007 Microchip Technology Inc.
Q4
0000 000x
-000 0000
0000 00-0
-000 0000
0000 00-0
POR, BOR
Value on
Q1
Inst (0005h)
Q2
Inst (0004h)
0005h
0000 000x
-000 0000
0000 00-0
-000 0000
0000 00-0
Q3
Value on
all other
Resets
Q4

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