ATMEGA8L-8MUR Atmel, ATMEGA8L-8MUR Datasheet - Page 116

• Manufacturer Part Number: ATMEGA8L-8MUR
• Description: MCU AVR 8KB FLASH 8MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8L-8MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timer/Counter
Register – TCNT2
Output Compare
Register – OCR2
116
ATmega8(L)
Table 45
PWM mode.
Table 45. Compare Output Mode, Phase Correct PWM Mode
Note:
• Bit 2:0 – CS22:0: Clock Select
The three clock select bits select the clock source to be used by the Timer/Counter, see
46.
Table 46. Clock Select Bit Description
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a Compare Match between TCNT2 and the OCR2 Register.
The Output Compare Register contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2 pin.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
COM21
CS22
0
0
1
1
0
0
0
0
1
1
1
1
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the Compare
shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase correct
COM20
Match is ignored, but the set or clear is done at TOP. See
111
CS21
0
1
0
1
R/W
R/W
for more details
0
0
1
1
0
0
1
1
7
0
7
0
Description
Normal port operation, OC2 disconnected
Reserved
Clear OC2 on Compare Match when up-counting. Set OC2 on Compare
Match when downcounting
Set OC2 on Compare Match when up-counting. Clear OC2 on Compare
Match when downcounting
R/W
R/W
6
0
6
0
CS20
0
1
0
1
0
1
0
1
R/W
R/W
5
0
5
0
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
clk
clk
clk
clk
T2S
T2S
T2S
T2S
T2S
T
T
2
2
S
S
/256 (From prescaler)
/1024 (From prescaler)
/(No prescaling)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
R/W
R/W
0
0
4
4
TCNT2[7:0]
OCR2[7:0]
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
(1)
“Phase Correct PWM Mode” on page
R/W
R/W
1
0
1
0
R/W
R/W
0
0
0
0
TCNT2
OCR2
2486Z–AVR–02/11
Table