ATTINY40-MMHR Atmel, ATTINY40-MMHR Datasheet - Page 95

• Manufacturer Part Number: ATTINY40-MMHR
• Description: MCU AVR 4KB FLASH 12MHZ 3X3 QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY40-MMHR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.10.2
12.10.3
12.10.4
8263A–AVR–08/10
TCNT1L – Timer/Counter1 Register Low Byte
TCNT1H – Timer/Counter1 Register High Byte
OCR1A – Timer/Counter1 Output Compare Register A
Table 12-4.
If external pin modes are used for the Timer/Counter1, transitions on the T1 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter1 Register Low Byte, TCNT1L, gives direct access, both for read and write
operations, to the Timer/Counter unit 8-bit counter. Writing to the TCNT1L Register blocks (dis-
ables) the Compare Match on the following timer clock. Modifying the counter (TCNT1L) while
the counter is running, introduces a risk of missing a Compare Match between TCNT1L and the
OCR1x Registers. In 16-bit mode the TCNT1L register contains the lower part of the 16-bit
Timer/Counter1 Register.
When 16-bit mode is selected (the TCW1 bit is set to one) the Timer/Counter Register TCNT1H
combined to the Timer/Counter Register TCNT1L gives direct access, both for read and write
operations, to the Timer/Counter unit 16-bit counter. To ensure that both the high and low bytes
are read and written simultaneously when the CPU accesses these registers, the access is per-
formed using an 8-bit temporary high byte register (TEMP). This temporary register is shared by
all the other 16-bit registers. See
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT1L). A match can be used to generate an Output Compare interrupt.
In 16-bit mode the OCR1A register contains the low byte of the 16-bit Output Compare Register.
To ensure that both the high and the low bytes are written simultaneously when the CPU writes
to these registers, the access is performed using an 8-bit temporary high byte register (TEMP).
This temporary register is shared by all the other 16-bit registers. See
16-bit Mode” on page
Bit
0x23
Read/Write
Initial Value
Bit
0x27
Read/Write
Initial Value
Bit
0x22
Read/Write
Initial Value
CS12
1
1
1
1
CS11
0
0
1
1
Clock Select Bit Description
R/W
R/W
R/W
7
0
7
0
7
0
CS10
90.
0
1
0
1
R/W
R/W
R/W
6
0
6
0
6
0
Description
clk
clk
External clock source on T1 pin. Clock on falling edge.
External clock source on T1 pin. Clock on rising edge.
I/O
I/O
“Accessing Registers in 16-bit Mode” on page 90
R/W
R/W
R/W
/256 (From prescaler)
/1024 (From prescaler)
5
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
TCNT1H[7:0]
TCNT1L[7:0]
OCR1A[7:0]
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
“Accessing Registers in
1
0
1
0
1
0
R/W
R/W
R/W
0
0
0
0
0
0
TCNT1H
TCNT1L
OCR1A
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