ATTINY40-MMHR Atmel, ATTINY40-MMHR Datasheet - Page 104
ATTINY40-MMHR
Manufacturer Part Number
ATTINY40-MMHR
Description
MCU AVR 4KB FLASH 12MHZ 3X3 QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY40-MMHR.pdf
(216 pages)
Specifications of ATTINY40-MMHR
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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14.2.3
104
ATtiny40
DIDR0 – Digital Input Disable Register 0
• Bit 6 – HLEV: Hysteresis Level
When enabled via the HSEL bit, the level of hysteresis can be set using the HLEV bit, as shown
in
Table 14-3.
• Bit 5 – ACLP
This bit is reserved for QTouch, always write as zero.
• Bit 4 – Reserved
This bit is reserved and will always read as zero.
• Bit 3 – ACCE
This bit is reserved for QTouch, always write as zero.
• Bit 2 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see
• Bit 1 – ACIRS1
This bit is reserved for QTouch, always write as zero.
• Bit 0 – ACIRS0
This bit is reserved for QTouch, always write as zero.
• Bits 2:1 – ADC2D, ADC1D: ADC[2:1] Digital Input Buffer Disable
When this bit is written logic one, the digital input buffer on the AIN[1:0] pin is disabled. The cor-
responding PIN Register bit will always read as zero when this bit is set. When used as an
analog input but not required as a digital input the power consumption in the digital input buffer
can be reduced by writing this bit to logic one.
Bit
0x0D
Read/Write
Initial Value
Table
HSEL
0
1
14-3.
Selecting Level of Analog Comparator Hysteresis
ADC7D
R/W
7
0
HLEV
X
0
1
ADC6D
R/W
“Analog Comparator Multiplexed Input” on page
6
0
ADC5D
Hysteresis of Analog Comparator
Not enabled
20 mV
50 mV
R/W
5
0
ADC4D
R/W
4
0
ADC3D
R/W
3
0
ADC2D
R/W
2
0
ADC1D
R/W
1
0
102.
ADC0D
R/W
0
0
8263A–AVR–08/10
DIDR0
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