ATTINY4-TSHR Atmel, ATTINY4-TSHR Datasheet - Page 93

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ATTINY4-TSHR

Manufacturer Part Number
ATTINY4-TSHR
Description
IC MCU AVR 512B FLASH SOT-23-6
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY4-TSHR

Package / Case
SOT-23-6
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
12MHz
Number Of I /o
4
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32 x 8
Program Memory Size
512B (512 x 8)
Oscillator Type
Internal
Peripherals
POR, PWM, WDT
Core Size
8-Bit
Controller Family/series
ATtiny
No. Of I/o's
4
Ram Memory Size
32Byte
Cpu Speed
12MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
32 B
Interface Type
ISP
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
4
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Package
6SOT-23
Device Core
AVR
Family Name
ATtiny
Maximum Speed
12 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY4-TSHR
Manufacturer:
ATMEL/爱特梅尔
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20 000
Company:
Part Number:
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13.11 ADC Conversion Result
8127D–AVR–02/10
Figure 13-12. Differential Non-linearity (DNL)
After the conversion is complete (ADIF is high), the conversion result can be found in the ADC
Data Register (ADCL). For single ended conversion, the result is
where V
voltage reference. 0x00 represents analog ground, and 0xFF represents the selected reference
voltage minus one LSB.
• Differential Non-linearity (DNL): The maximum deviation of the actual code width (the interval
• Quantization Error: Due to the quantization of the input voltage into a finite number of codes,
• Absolute Accuracy: The maximum deviation of an actual (unadjusted) transition compared to
between two adjacent transitions) from the ideal code width (1 LSB). Ideal value: 0 LSB.
a range of input voltages (1 LSB wide) will code to the same value. Always ± 0.5 LSB.
an ideal transition for any code. This is the compound effect of offset, gain error, differential
error, non-linearity, and quantization error. Ideal value: ± 0.5 LSB.
Output Code
IN
(see
0x00
0xFF
Table 13-2 on page
0
1 LSB
94) is the voltage on the selected input pin and V
ADCL
=
V
---------------------- -
IN
V
CC
256
V
ATtiny4/5/9/10
REF
Input Voltage
CC
is the
93

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