ATTINY4-TSHR Atmel, ATTINY4-TSHR Datasheet - Page 107

• Manufacturer Part Number: ATTINY4-TSHR
• Description: IC MCU AVR 512B FLASH SOT-23-6
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY4-TSHR

• Package / Case: SOT-23-6
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 12MHz
• Number Of I /o: 4
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 32 x 8
• Program Memory Size: 512B (512 x 8)
• Oscillator Type: Internal
• Peripherals: POR, PWM, WDT
• Core Size: 8-Bit
• Controller Family/series: ATtiny
• No. Of I/o's: 4
• Ram Memory Size: 32Byte
• Cpu Speed: 12MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 32 B
• Interface Type: ISP
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 4
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• Package: 6SOT-23
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 12 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

14.7.3
8127D–AVR–02/10
TPISR – Tiny Programming Interface Status Register
• Bits 2:0 – GT[2:0]: Guard Time
These bits specify the number of additional IDLE bits that are inserted to the idle time when
changing from reception mode to transmission mode. Additional delays are not inserted when
changing from transmission mode to reception.
The total idle time when changing from reception to transmission mode is Guard Time plus two
IDLE bits.
Table 14-13. Guard Time Settings
The default Guard Time is 128 IDLE bits. To speed up the communication, the Guard Time
should be set to the shortest safe value.
• Bits 7:2, 0 – Res: Reserved Bits
These bits are reserved and will always read zero.
• Bit 1 – NVMEN: Non-Volatile Memory Programming Enabled
NVM programming is enabled when this bit is set. The external programmer can poll this bit to
verify the interface has been successfully enabled.
NVM programming is disabled by writing this bit to zero.
Bit
CSS: 0x00
Read/Write
Initial Value
GT2
0
0
0
0
1
1
1
1
Table 14-13
R
7
–
0
shows the available Guard Time settings.
R
6
–
0
GT1
0
0
1
1
0
0
1
1
R
5
–
0
R
4
–
0
GT0
0
1
0
1
0
1
0
1
R
3
–
0
Guard Time (Number of IDLE bits)
+128 (default value)
+64
+32
+16
+8
+4
+2
+0
R
2
–
0
NVMEN
R/W
1
0
ATtiny4/5/9/10
R
0
–
0
TPIPCR
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