ATTINY4-TSHR Atmel, ATTINY4-TSHR Datasheet - Page 110

• Manufacturer Part Number: ATTINY4-TSHR
• Description: IC MCU AVR 512B FLASH SOT-23-6
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY4-TSHR

• Package / Case: SOT-23-6
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 12MHz
• Number Of I /o: 4
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 32 x 8
• Program Memory Size: 512B (512 x 8)
• Oscillator Type: Internal
• Peripherals: POR, PWM, WDT
• Core Size: 8-Bit
• Controller Family/series: ATtiny
• No. Of I/o's: 4
• Ram Memory Size: 32Byte
• Cpu Speed: 12MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 32 B
• Interface Type: ISP
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 4
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• Package: 6SOT-23
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 12 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

15.3.2
15.3.3
110
ATtiny4/5/9/10
Flash Memory
Configuration Section
The embedded Flash memory of ATtiny4/5/9/10 has four separate sections, as shown in
15-3
Table 15-3.
Notes:
Table 15-4.
Notes:
ATtiny4/5/9/10 have one configuration byte, which resides in the configuration section. See
Table
Table 15-5.
Table 15-6
into the configuration byte.
Table 15-6.
Section
Code (program memory)
Configuration
Signature
Calibration
Section
Code (program memory)
Configuration
Signature
Calibration
Configuration word address
0x00
0x01 ... 0x07
Bit
7:3
2
1
0
and
15-5.
1. This section is read-only.
1. This section is read-only.
Table
(1)
(1)
(1)
(1)
briefly describes the functionality of all configuration bits and how they are mapped
Bit Name
–
CKOUT
WDTON
RSTDISBL
Number of Words and Pages in the Flash (ATtiny9/10)
Number of Words and Pages in the Flash (ATtiny4/5)
Configuration bytes
Configuration Byte 0
15-3.
Size (Bytes)
Size (Bytes)
Description
Reserved
System Clock Output
Watchdog Timer always on
External Reset disable
1024
512
16
16
8
8
8
8
High byte
Reserved
Reserved
Page Size (Words)
Page Size (Words)
8
8
8
8
8
8
8
8
Configuration word data
Pages
Pages
Low byte
Configuration Byte 0
Reserved
64
32
1
2
1
1
2
1
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
WADDR
WADDR
[3:1]
[3:1]
[3:1]
[3:1]
[3:1]
[3:1]
[3:1]
[3:1]
8127D–AVR–02/10
PADDR
PADDR
[9:4]
[4:4]
[9:4]
[4:4]
–
–
–
–
Table