ATTINY4-TSHR Atmel, ATTINY4-TSHR Datasheet - Page 14
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ATTINY4-TSHR
Manufacturer Part Number
ATTINY4-TSHR
Description
IC MCU AVR 512B FLASH SOT-23-6
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY10-TSHR.pdf
(169 pages)
Specifications of ATTINY4-TSHR
Package / Case
SOT-23-6
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
12MHz
Number Of I /o
4
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32 x 8
Program Memory Size
512B (512 x 8)
Oscillator Type
Internal
Peripherals
POR, PWM, WDT
Core Size
8-Bit
Controller Family/series
ATtiny
No. Of I/o's
4
Ram Memory Size
32Byte
Cpu Speed
12MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
32 B
Interface Type
ISP
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
4
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Package
6SOT-23
Device Core
AVR
Family Name
ATtiny
Maximum Speed
12 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY4-TSHR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
5. Memories
5.1
5.2
14
In-System Re-programmable Flash Program Memory
Data Memory
ATtiny4/5/9/10
This section describes the different memories in the ATtiny4/5/9/10. Devices have two main
memory areas, the program memory space and the data memory space.
The ATtiny4/5/9/10 contain 512/1024 bytes of on-chip, in-system reprogrammable Flash mem-
ory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized
as 256/512 x 16.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATtiny4/5/9/10
Program Counter (PC) is 9 bits wide, thus capable of addressing the 256/512 program memory
locations, starting at 0x000.
on Flash data serial downloading.
Constant tables can be allocated within the entire address space of program memory. Since pro-
gram memory can not be accessed directly, it has been mapped to the data memory. The
mapped program memory begins at byte address 0x4000 in data memory (see
page
must be addressed starting from 0x4000 when accessed via the data memory.
Internal write operations to Flash program memory have been disabled and program memory
therefore appears to firmware as read-only. Flash memory can still be written to externally but
internal write operations to the program memory area will not be succesful.
Timing diagrams of instruction fetch and execution are presented in
ing” on page
Data memory locations include the I/O memory, the internal SRAM memory, the non-volatile
memory lock bits, and the Flash memory. See
the ATtiny4/5/9/10 memory space is organized.
The first 64 locations are reserved for I/O memory, while the following 32 data memory locations
address the internal data SRAM.
The non-volatile memory lock bits and all the Flash memory sections are mapped to the data
memory space. These locations appear as read-only for device firmware.
The four different addressing modes for data memory are direct, indirect, indirect with pre-decre-
ment, and indirect with post-increment. In the register file, registers R26 to R31 function as
pointer registers for indirect addressing.
The IN and OUT instructions can access all 64 locations of I/O memory. Direct addressing using
the LDS and STS instructions reaches the 128 locations between 0x0040 and 0x00BF.
The indirect addressing reaches the entire data memory space. When using indirect addressing
modes with automatic pre-decrement and post-increment, the address registers X, Y, and Z are
decremented or incremented.
15). Although programs are executed starting from address 0x000 in program memory it
9.
“Memory Programming” on page 108
Figure 5-1 on page 15
contains a detailed description
“Instruction Execution Tim-
for an illustration on how
Figure 5-1 on
8127D–AVR–02/10