C8051F705-GM Silicon Laboratories Inc, C8051F705-GM Datasheet - Page 80

• Manufacturer Part Number: C8051F705-GM
• Description: IC 8051 MCU 15K FLASH 48-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F70xr

Specifications of C8051F705-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 15KB (15K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 32 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Processor Series: C8051F7x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F700DK
• Minimum Operating Temperature: - 40 C
• Height: 0.95 mm
• Length: 7 mm
• Supply Voltage (max): 1.9 V, 3.6 V
• Supply Voltage (min): 1.7 V, 1.8 V
• Width: 7 mm
• For Use With: 336-1635 - DEV KIT FOR C8051F700
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1612-5

C8051F70x/71x
15. Capacitive Sense (CS0)
The Capacitive Sense subsystem uses a capacitance-to-digital circuit to determine the capacitance on a
port pin. The module can take measurements from different port pins using the module’s analog multi-
plexer. The module is enabled only when the CS0EN bit (CS0CN) is set to 1. Otherwise the module is in a
low-power shutdown state. The module can be configured to take measurements on one port pin or a
group of port pins, using auto-scan. A selectable gain circuit allows the designer to adjust the maximum
allowable capacitance. An accumulator is also included, which can be configured to average multiple con-
versions on an input channel. Interrupts can be generated when CS0 completes a conversion or when the
measured value crosses a threshold defined in CS0THH:L.
80
. . .
CS0SS
Auto-Scan
CS0MX
CS0MD1
Logic
CS0SE
1x-8x
Port I/O and
Peripherals
Pin Monitor
CS0PM
CS0MD2
Digital Converter
Capacitance to
Figure 15.1. CS0 Block Diagram
Rev. 1.0
CS0CN
12, 13, 14, or 16 bits
Conversion
Start
22-Bit Accumulator
Compare Logic
Greater Than
CS0THH:L
CS0DH:L
000
001
010
011
100
101
110
111
Timer 3 Overflow
Initiated continuously
CS0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
Reserved
Initiated continuously
when auto-scan
enabled
CS0CF
CS0CMPF