C8051F705-GM Silicon Laboratories Inc, C8051F705-GM Datasheet - Page 291

• Manufacturer Part Number: C8051F705-GM
• Description: IC 8051 MCU 15K FLASH 48-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F70xr

Specifications of C8051F705-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 15KB (15K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 32 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Processor Series: C8051F7x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F700DK
• Minimum Operating Temperature: - 40 C
• Height: 0.95 mm
• Length: 7 mm
• Supply Voltage (max): 1.9 V, 3.6 V
• Supply Voltage (min): 1.7 V, 1.8 V
• Width: 7 mm
• For Use With: 336-1635 - DEV KIT FOR C8051F700
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1612-5

34.3.4. Frequency Output Mode
Frequency Output Mode produces a programmable-frequency square wave on the module’s associated
CEXn pin. The capture/compare module high byte holds the number of PCA clocks to count before the out-
put is toggled. The frequency of the square wave is then defined by Equation 34.1.
Where F
PCA0MD. The lower byte of the capture/compare module is compared to the PCA counter low byte; on a
match, CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn.
Frequency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn reg-
ister. The MATn bit should normally be set to 0 in this mode. If the MATn bit is set to 1, the CCFn flag for
the channel will be set when the 16-bit PCA0 counter and the 16-bit capture/compare register for the chan-
nel are equal.
Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.
PCA0CPLn
Write to
Reset
PCA0CPHn
PCA
Write to
is the frequency of the clock selected by the CPS2–0 bits in the PCA mode register,
0
ENB
ENB
1
Equation 34.1. Square Wave Frequency Output
W
M
P
1
6
n
x
C
O
M
E
n
Figure 34.7. PCA Frequency Output Mode
PCA0CPMn
C
A
P
P
n
0 0 0
C
A
P
N
n
M
A
T
n
T
O
G
n
W
P
M
n
C
C
E
F
n
x
PCA Timebase
F
CEXn
Enable
=
Rev. 1.0
---------------------------------------- -
2
Comparator
PCA0CPLn
PCA0L

8-bit
PCA0CPHn
F
PCA
match
Enable
Adder
8-bit Adder
Toggle
C8051F70x/71x
TOGn
0
1
CEXn
PCA0CPHn
Crossbar
Port I/O
291