MC908JL16CSPE Freescale Semiconductor, MC908JL16CSPE Datasheet - Page 49

• Manufacturer Part Number: MC908JL16CSPE
• Description: IC MCU 16K FLASH 8MHZ 32-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JL16CSPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-SDIP (0.400", 10.16mm)
• Controller Family/series: HC08
• No. Of I/o's: 26
• Ram Memory Size: 512Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• For Use With: DEMO908JL16E - BOARD DEMO FOR MC908JL16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

4.3.2 Active Resets from Internal Sources
All internal reset sources actively pull the RST pin low for 32 ICLK cycles to allow resetting of external
peripherals. The internal reset signal IRST continues to be asserted for an additional 32 cycles
(Figure
(See
cycles during which the SIM forces the RST pin low. The internal reset signal then follows the sequence
from the falling edge of RST shown in
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals and other chips within a system
built around the MCU.
4.3.2.1 Power-On Reset
When power is first applied to the MCU, the power-on reset module (POR) generates a pulse to indicate
that power-on has occurred. The external reset pin (RST) is held low while the SIM counter counts out
4096 ICLK cycles. Sixty-four ICLK cycles later, the CPU and memories are released from reset to allow
the reset vector sequence to occur.
At power-on, the following events occur:
Freescale Semiconductor
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Figure 4-6. Sources of Internal
A POR pulse is generated.
The internal reset signal is asserted.
The SIM enables OSCOUT.
Internal clocks to the CPU and modules are held inactive for 4096 ICLK cycles to allow stabilization
of the oscillator.
The RST pin is driven low during the oscillator stabilization time.
The POR bit of the reset status register (RSR) is set and all other bits in the register are cleared.
4-5). An internal reset can be caused by an illegal address, illegal opcode, COP time-out, or POR.
IRST
ICLK
RST
IAB
RST PULLED LOW BY MCU
ILLEGAL ADDRESS RST
Figure 4-6. Sources of Internal Reset
ILLEGAL OPCODE RST
Figure 4-5. Internal Reset Timing
MC68HC908JL16 Data Sheet, Rev. 1.1
Reset.) Note that for POR resets, the SIM cycles through 4096 ICLK
Figure
32 CYCLES
COPRST
POR
4-5.
LVI
32 CYCLES
INTERNAL RESET
VECTOR HIGH
Reset and System Initialization
49