P89LPC931FDH,112 NXP Semiconductors, P89LPC931FDH,112 Datasheet - Page 7

IC 80C51 MCU FLASH 8K 28-TSSOP

P89LPC931FDH,112

Manufacturer Part Number
P89LPC931FDH,112
Description
IC 80C51 MCU FLASH 8K 28-TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet

Specifications of P89LPC931FDH,112

Core Processor
8051
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSSOP
Processor Series
P89LPC9x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
26
Number Of Timers
2
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 45 C
For Use With
622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART622-1002 - USB IN-CIRCUIT PROG LPC9XX568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
568-1284-5
935273877112
P89LPC931FDH
P89LPC931FDH,129
P89LPC931FDH-S
Philips Semiconductors
Table 3:
9397 750 14472
Product data
Symbol
P1.0 - P1.7
Pin description
Pin
18, 17, 12,
11, 10, 6,
5, 4
18
17
12
11
10
6
5
4
…continued
Type
I/O, I
I/O
O
I/O
I
I/O
I/O
I/O
I
I
I/O
I
I
I
I
I/O
I/O
[1]
Description
Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type, except for
three pins as noted below. During reset Port 1 latches are configured in the input only
mode with the internal pull-up disabled. The operation of the configurable Port 1 pins
as inputs and outputs depends upon the port configuration selected. Each of the
configurable port pins are programmed independently. Refer to
configurations”
open drain when used as outputs. P1.5 is input only.
All pins have Schmitt triggered inputs.
Port 1 also provides various special functions as described below:
P1.0 — Port 1 bit 0.
TxD — Transmitter output for the serial port.
P1.1 — Port 1 bit 1.
RXD — Receiver input for the serial port.
P1.2 — Port 1 bit 2 (open-drain when used as output).
T0 — Timer/counter 0 external count input or overflow output (open-drain when used
as output).
SCL — I
P1.3 — Port 1 bit 3 (open-drain when used as output).
INT0 — External interrupt 0 input.
SDA — I
P1.4 — Port 1 bit 4.
INT1 — External interrupt 1 input.
P1.5 — Port 1 bit 5 (input only).
RST — External Reset input during Power-on or if selected via UCFG1. When
functioning as a reset input a LOW on this pin resets the microcontroller, causing I/O
ports and peripherals to take on their default states, and the processor begins
execution at address 0. Also used during a power-on sequence to force In-System
Programming mode. When using an oscillator frequency above 12 MHz, the
reset input function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until V
When system power is removed V
operating voltage. When using an oscillator frequency above 12 MHz, in some
applications, an external brownout detect circuit may be required to hold the
device in reset when V
P1.6 — Port 1 bit 6.
P1.7 — Port 1 bit 7.
2
2
Rev. 05 — 15 December 2004
C serial clock input/output.
C serial data input/output.
and
Table 7 “DC electrical characteristics”
DD
falls below the minimum specified operating voltage.
8-bit microcontrollers with two-clock 80C51 core
DD
will fall below the minimum specified
DD
P89LPC930/931
has reached its specified level.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
for details. P1.2 - P1.3 are
Section 8.11.1 “Port
7 of 55

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