P89LPC931FDH,112 NXP Semiconductors, P89LPC931FDH,112 Datasheet - Page 38

• Manufacturer Part Number: P89LPC931FDH,112
• Description: IC 80C51 MCU FLASH 8K 28-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC931FDH,112

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSSOP
• Processor Series: P89LPC9x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 45 C
• For Use With: 622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART622-1002 - USB IN-CIRCUIT PROG LPC9XX568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-1284-5; 935273877112; P89LPC931FDH; P89LPC931FDH,129; P89LPC931FDH-S

Philips Semiconductors
9397 750 14472
Product data
8.24.1 General description
8.24.2 Features
8.24.3 Using Flash as data storage
8.24.4 ISP and IAP capabilities of the P89LPC930/931
8.24 Flash program memory
The P89LPC930/931 Flash memory provides in-circuit electrical erasure and
programming. The Flash can be read, erased, or written as bytes. The Sector and
Page Erase functions can erase any Flash sector (1 kB) or page (64 bytes). The Chip
Erase operation will erase the entire program memory. In-System Programming and
standard parallel programming are both available. On-chip erase and write timing
generation contribute to a user-friendly programming interface. The P89LPC930/931
Flash reliably stores memory contents even after more than 100,000 erase and
program cycles. The cell is designed to optimize the erase and programming
mechanisms. The P89LPC930/931 uses V
Program/Erase algorithms.
The Flash code memory array of this device supports individual byte erasing and
programming. Any byte in the code memory array may be read using the MOVC
instruction, provided that the sector containing the byte has not been secured (a
MOVC instruction is not allowed to read code memory contents of a secured sector).
Thus any byte in a non-secured sector may be used for non-volatile data storage.
Flash organization:
sectors. Each sector can be further divided into 64-byte pages. In addition to sector
erase and page erase, a 64-byte page register is included which allows from 1 to 64
bytes of a given page to be programmed at the same time, substantially reducing
overall programming time. An In-Application Programming (IAP) interface is provided
to allow the end user’s application to erase and reprogram the user code memory. In
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Byte-erase allowing code memory to be used for data storage.
Internal fixed boot ROM, containing low-level In-Application Programming (IAP)
routines.
User programs can call these routines to perform In-Application Programming
(IAP).
Default loader providing In-System Programming via the serial port, located in
upper end of user program memory.
Boot vector allows user-provided Flash loader code to reside anywhere in the
Flash memory space, providing flexibility to the user.
Programming and erase over the full operating voltage range.
Programming/Erase using ISP/IAP.
Any flash program/erase operation in 2 ms.
Parallel programming with industry-standard commercial programmers.
Programmable security for the code in the Flash for each sector.
More than 100,000 typical erase/program cycles for each byte.
10 year minimum data retention.
Rev. 05 — 15 December 2004
The P89LPC930/931 program memory consists of eight 1 KB
8-bit microcontrollers with two-clock 80C51 core
DD
as the supply voltage to perform the
P89LPC930/931
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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