PIC12CE519/JW Microchip Technology, PIC12CE519/JW Datasheet - Page 563
![IC MCU EPROM 1KX12 W/EE 8CDIP](/photos/12/23/122362/pic12ce519_jw_sml.jpg)
PIC12CE519/JW
Manufacturer Part Number
PIC12CE519/JW
Description
IC MCU EPROM 1KX12 W/EE 8CDIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12C508A-04SM.pdf
(113 pages)
3.PIC12C508A-04SM.pdf
(4 pages)
4.PIC12CE518-04SM.pdf
(16 pages)
Specifications of PIC12CE519/JW
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
EPROM, UV
Eeprom Size
16 x 8
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-CDIP (0.300", 7.62mm) Window
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12CE519/JW
Manufacturer:
MICROCH
Quantity:
20 000
- PIC16F688T-ISL PDF datasheet
- PIC12C508A-04SM PDF datasheet #2
- PIC12C508A-04SM PDF datasheet #3
- PIC12CE518-04SM PDF datasheet #4
- Current page: 563 of 688
- Download datasheet (3Mb)
1997 Microchip Technology Inc.
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example 1
Example 2
Example 3
Q1
Decode
Q2
register 'f'
[ label ] SWAPF f,d
0
d
(f<3:0>)
(f<7:4>)
None
The upper and lower nibbles of register 'f' are exchanged. If 'd' is 0 the
result is placed in W register. If 'd' is 1 the result is placed in register 'f'.
1
1
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Read
SWAPF
SWAPF
SWAPF
00
f
[0,1]
Section 29. Instruction Set
127
W
FSR = 0xC2
Contents of Address (FSR) = 0x20
W
FSR = 0xC2
Contents of Address (FSR) = 0x02
Swap Nibbles in f
REG, 0
REG, 1
REG1= 0xA5
REG1= 0xA5
W
REG1= 0xA5
REG1= 0x5A
INDF, 1
Q3
1110
destination<7:4>,
destination<3:0>
Process
= 0x17
= 0x17
data
= 0x5A
dfff
Q4
destination
Write to
ffff
DS31029A-page 29-41
29
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