PIC12CE519/JW Microchip Technology, PIC12CE519/JW Datasheet - Page 381
![IC MCU EPROM 1KX12 W/EE 8CDIP](/photos/12/23/122362/pic12ce519_jw_sml.jpg)
PIC12CE519/JW
Manufacturer Part Number
PIC12CE519/JW
Description
IC MCU EPROM 1KX12 W/EE 8CDIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12C508A-04SM.pdf
(113 pages)
3.PIC12C508A-04SM.pdf
(4 pages)
4.PIC12CE518-04SM.pdf
(16 pages)
Specifications of PIC12CE519/JW
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
EPROM, UV
Eeprom Size
16 x 8
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-CDIP (0.300", 7.62mm) Window
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12CE519/JW
Manufacturer:
MICROCH
Quantity:
20 000
- PIC16F688T-ISL PDF datasheet
- PIC12C508A-04SM PDF datasheet #2
- PIC12C508A-04SM PDF datasheet #3
- PIC12CE518-04SM PDF datasheet #4
- Current page: 381 of 688
- Download datasheet (3Mb)
20.12
1997 Microchip Technology Inc.
Initialization
The code in
of the PIC16C62X devices. RA3 and RA4 are configured as digital output. RA0 and RA1 are con-
figured as the V- inputs and RA2 as the V+ input to both comparators.
Example 20-1:
FLAG_REG
;
CLRF
CLRF
ANDLW
IORWF
MOVLW
MOVWF
BSF
MOVLW
MOVWF
BCF
CALL
MOVF
BCF
BSF
BSF
BCF
BSF
BSF
Example 20-1
EQU
FLAG_REG
PORTA
0xC0
FLAG_REG,F
0x03
CMCON
STATUS,RP0
0x07
TRISA
STATUS,RP0
DELAY 10
CMCON,F
PIR1,CMIF
STATUS,RP0
PIE1,CMIE
STATUS,RP0
INTCON,PEIE
INTCON,GIE
Initializing Comparator Module (PIC16C62X)
0X20
depicts example steps required to configure the comparator module
; Init flag register
; Init PORTA
; Mask comparator bits
; Store bits in flag register
; Init comparator mode
; CM<2:0> = 011
; Select Bank1
; Initialize data direction
; Set RA<2:0> as inputs, RA<4:3> as outputs,
;
; Select Bank0
; 10 s delay
; Read
; Clear pending interrupts
; Select Bank1
; Enable comparator interrupts
; Select Bank0
; Enable peripheral interrupts
; Global interrupt enable
Section 20. Comparator
TRISA<7:5> always read ‘0’
CMCON to end change condition
DS31020A-page 20-11
20
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