PIC18LF4685-I/P Microchip Technology, PIC18LF4685-I/P Datasheet - Page 132
![IC PIC MCU FLASH 48KX16 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18LF4685-I/P
Manufacturer Part Number
PIC18LF4685-I/P
Description
IC PIC MCU FLASH 48KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XT0.pdf
(484 pages)
3.PIC18F2221-ISO.pdf
(46 pages)
4.PIC18F2682-ISP.pdf
(6 pages)
5.PIC18F2682-ISP.pdf
(4 pages)
Specifications of PIC18LF4685-I/P
Core Size
8-Bit
Program Memory Size
96KB (48K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
1024Byte
Ram Memory Size
3.25KB
Cpu Speed
40MHz
No. Of Timers
4
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Interface Type
CAN/I2C/SPI/USART
On-chip Adc
11-chx10-bit
Number Of Timers
4
Core
PIC
Processor Series
PIC18LF
Maximum Clock Frequency
40 MHz
Data Ram Size
3.25 KB
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
11
Height
4.95 mm
Length
53.21 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
14.73 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF4685-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18LF4685-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PCM18XT0 PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2682-ISP PDF datasheet #4
- PIC18F2682-ISP PDF datasheet #5
- Current page: 132 of 484
- Download datasheet (9Mb)
PIC18F2682/2685/4682/4685
TABLE 10-1:
DS39761C-page 132
RA0/AN0/CV
RA1/AN1
RA2/AN2/V
RA3/AN3/V
RA4/T0CKI
RA5/AN4/SS/HLVDIN RA5
OSC2/CLKO/RA6
OSC1/CLKI/RA7
Legend:
Note 1:
Pin Name
REF
REF
OUT = Output; IN = Input; ANA = Analog Signal; DIG = Digital Output; ST = Schmitt Buffer Input; TTL = TTL Buffer Input
This bit is unimplemented on PIC18F2682/2685 devices.
REF
-
+
PORTA I/O SUMMARY
RA0
AN0
CV
RA1
AN1
RA2
AN2
V
RA3
AN3
V
RA4
T0CKI
AN4
SS
HLVDIN
OSC2
CLKO
RA6
OSC1
CLKI
RA7
Function
REF
REF
REF
-
+
(1)
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
TRIS
0
1
1
x
0
1
1
0
1
1
1
0
1
1
1
0
1
1
0
1
1
1
1
x
x
0
1
x
x
0
1
Buffer
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
TTL
DIG
DIG
TTL
DIG
TTL
ST
LATA<0> data output.
PORTA<0> data input.
A/D input channel 0. Enabled on POR, this analog input overrides the
digital input (read as clear – low level).
Comparator voltage reference analog output. Enabling this analog
output overrides the digital I/O (read as clear – low level).
LATA<1> data output.
PORTA<1> data input.
A/D input channel 1. Enabled on POR, this analog input overrides the
digital input (read as clear – low level).
LATA<2> data output.
PORTA<2> data input.
A/D input channel 2. Enabled on POR, this analog input overrides the
digital input (read as clear – low level).
A/D and comparator negative voltage analog input.
LATA<3> data output.
PORTA<3> data input.
A/D input channel 3. Enabled on POR, this analog input overrides the
digital input (read as clear – low level).
A/D and comparator positive voltage analog input.
LATA<4> data output.
PORTA<4> data input.
Timer0 clock input.
LATA<5> data output.
PORTA<5> data input.
A/D input channel 4. Enabled on POR, this analog input overrides the
digital input (read as clear – low level).
Slave select input for MSSP.
High/Low-Voltage Detect external trip point input.
Output connection, selected by FOSC3:FOSC0 Configuration bits.
Enabling OSC2 overrides digital I/O.
Output connection, selected by FOSC3:FOSC0 Configuration bits.
Enabling CLKO overrides digital I/O (F
LATA<6> data output.
PORTA<6> data input.
Main oscillator input connection, determined by FOSC3:FOSC0
Configuration bits. Enabling OSC1 overrides digital I/O.
Main clock input connection, determined by FOSC3:FOSC0
Configuration bits. Enabling CLKI overrides digital I/O.
LATA<7> data output.
PORTA<7> data input.
Description
© 2009 Microchip Technology Inc.
OSC
/4).
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