PIC18LF248-I/SP Microchip Technology, PIC18LF248-I/SP Datasheet - Page 306

IC MCU CAN FLASH 8K LP 28DIP

PIC18LF248-I/SP

Manufacturer Part Number
PIC18LF248-I/SP
Description
IC MCU CAN FLASH 8K LP 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF248-I/SP

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
22
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS41159E-page 304
PIC18FXX8
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
W
Q1
=
=
Inclusive OR Literal with W
[ label ]
0
(W) .OR. k
N, Z
The contents of W are ORed with the
eight-bit literal ‘k’. The result is placed in
W.
1
1
literal ‘k’
IORLW
Read
0000
Q2
k
0x9A
0xBF
255
IORLW k
1001
0x35
W
Process
Data
Q3
kkkk
Write to W
Q4
kkkk
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
RESULT =
W
RESULT =
W
Q1
=
=
register ‘f’
Inclusive OR W with f
[ label ]
0
d
a
(W) .OR. (f)
N, Z
Inclusive OR W with register ‘f’. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is ‘1’,
the result is placed back in register ‘f’
(default). If ‘a’ is ‘0’, the Access Bank
will be selected, overriding the BSR
value. If ‘a’ = 1, then the bank will be
selected as per the BSR value (default).
1
1
IORWF RESULT, W
Read
0001
Q2
f
[0,1]
[0,1]
0x13
0x91
0x13
0x93
© 2006 Microchip Technology Inc.
255
IORWF
00da
Process
dest
Data
Q3
f [,d [,a]]
ffff
destination
Write to
Q4
ffff

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