DSPIC30F2011-30I/P Microchip Technology, DSPIC30F2011-30I/P Datasheet - Page 205
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DSPIC30F2011-30I/P
Manufacturer Part Number
DSPIC30F2011-30I/P
Description
IC DSPIC MCU/DSP 12K 18DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(26 pages)
7.DSPIC30F2012-30ISO.pdf
(205 pages)
Specifications of DSPIC30F2011-30I/P
Program Memory Type
FLASH
Program Memory Size
12KB (4K x 24)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
12
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011, DM300018, DM183021
Minimum Operating Temperature
- 40 C
Package
18PDIP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F005 - MODULE SCKT DSPIC30F 18DIP/SOICDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLEACICE0202 - ADAPTER MPLABICE 18P 300 MIL
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F2011-30IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2011-30I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Timing Specifications
Trap Vectors ....................................................................... 69
U
UART Module
UART Operation
Unit ID Locations............................................................... 123
Universal Asynchronous Receiver Transmitter
W
Wake-up from Sleep ......................................................... 123
Wake-up from Sleep and Idle ............................................. 70
Watchdog Timer
Watchdog Timer (WDT) ............................................ 123, 133
WWW Address.................................................................. 205
WWW, On-Line Support ....................................................... 9
© 2010 Microchip Technology Inc.
Reset......................................................................... 165
Simple OC/PWM Mode............................................. 171
SPI Module
Type A Timer External Clock .................................... 167
Type B Timer External Clock .................................... 168
Type C Timer External Clock .................................... 168
Watchdog Timer........................................................ 165
PLL Clock.................................................................. 162
Address Detect Mode ............................................... 109
Auto-Baud Support ................................................... 109
Baud Rate Generator................................................ 109
Enabling and Setting Up ........................................... 107
Framing Error (FERR)............................................... 109
Idle Status ................................................................. 109
Loopback Mode ........................................................ 109
Operation During CPU Sleep and Idle Modes .......... 110
Overview ................................................................... 105
Parity Error (PERR) .................................................. 109
Receive Break........................................................... 109
Receive Buffer (UxRXB) ........................................... 108
Receive Buffer Overrun Error (OERR Bit) ................ 108
Receive Interrupt....................................................... 108
Receiving Data.......................................................... 108
Receiving in 8-bit or 9-bit Data Mode........................ 108
Reception Error Handling.......................................... 108
Transmit Break.......................................................... 108
Transmit Buffer (UxTXB)........................................... 107
Transmit Interrupt...................................................... 108
Transmitting Data...................................................... 107
Transmitting in 8-bit Data Mode................................ 107
Transmitting in 9-bit Data Mode................................ 107
UART1 Register Map................................................ 111
UART2 Register Map................................................ 111
Idle Mode .................................................................. 110
Sleep Mode............................................................... 110
(UART) Module ......................................................... 105
Timing Characteristics .............................................. 165
Timing Requirements................................................ 165
Enabling and Disabling ............................................. 133
Operation .................................................................. 133
Master Mode (CKE = 0) .................................... 172
Master Mode (CKE = 1) .................................... 173
Slave Mode (CKE = 0) ...................................... 174
Slave Mode (CKE = 1) ...................................... 176
dsPIC30F2011/2012/3012/3013
DS70139G-page 205