DSPIC30F2011-30I/P Microchip Technology, DSPIC30F2011-30I/P Datasheet - Page 203
![IC DSPIC MCU/DSP 12K 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
DSPIC30F2011-30I/P
Manufacturer Part Number
DSPIC30F2011-30I/P
Description
IC DSPIC MCU/DSP 12K 18DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(26 pages)
7.DSPIC30F2012-30ISO.pdf
(205 pages)
Specifications of DSPIC30F2011-30I/P
Program Memory Type
FLASH
Program Memory Size
12KB (4K x 24)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
12
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011, DM300018, DM183021
Minimum Operating Temperature
- 40 C
Package
18PDIP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F005 - MODULE SCKT DSPIC30F 18DIP/SOICDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLEACICE0202 - ADAPTER MPLABICE 18P 300 MIL
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F2011-30IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2011-30I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Interrupt Controller
Interrupt Priority .................................................................. 66
Interrupt Sequence ............................................................. 69
Interrupts ............................................................................. 65
L
Load Conditions ................................................................ 160
Low Voltage Detect (LVD) ................................................ 133
Low-Voltage Detect Characteristics .................................. 157
LVDL Characteristics ........................................................ 157
M
Memory Organization.......................................................... 29
Microchip Internet Web Site .............................................. 205
Modulo Addressing ............................................................. 44
MPLAB ASM30 Assembler, Linker, Librarian ................... 146
MPLAB Integrated Development Environment Software .. 145
MPLAB PM3 Device Programmer .................................... 148
MPLAB REAL ICE In-Circuit Emulator System................. 147
MPLINK Object Linker/MPLIB Object Librarian ................ 146
N
NVM
O
OC/PWM Module Timing Characteristics.......................... 171
Operating Current (I
Operating Frequency vs Voltage
Oscillator
Oscillator Selection ........................................................... 123
Oscillator Start-up Timer
Output Compare Interrupts ................................................. 90
Output Compare Module..................................................... 87
Output Compare Operation During CPU Idle Mode............ 90
Output Compare Sleep Mode Operation ............................ 90
P
Packaging Information ...................................................... 187
Peripheral Module Disable (PMD) Registers .................... 135
Pinout Descriptions ............................................................. 16
© 2010 Microchip Technology Inc.
Register Map......................................................... 71, 72
Traps........................................................................... 67
Interrupt Stack Frame ................................................. 69
Core Register Map...................................................... 39
Applicability ................................................................. 46
Incrementing Buffer Operation Example..................... 45
Start and End Address................................................ 45
W Address Register Selection .................................... 45
Register Map............................................................... 53
dsPIC30FXXXX-20 (Extended)................................. 150
Configurations........................................................... 126
Operating Modes (Table) .......................................... 124
System Overview ...................................................... 123
Timing Characteristics .............................................. 165
Timing Requirements................................................ 165
Register Map............................................................... 91
Timing Characteristics .............................................. 170
Timing Requirements................................................ 170
Marking ............................................................. 187, 188
Fail-Safe Clock Monitor .................................... 128
Fast RC (FRC) .................................................. 127
Initial Clock Source Selection ........................... 126
Low-Power RC (LPRC)..................................... 127
LP Oscillator Control ......................................... 127
Phase Locked Loop (PLL) ................................ 127
Start-up Timer (OST) ........................................ 126
DD
)..................................................... 152
dsPIC30F2011/2012/3012/3013
PLL Clock Timing Specifications ...................................... 162
POR. See Power-on Reset.
Port Write/Read Example ................................................... 60
PORTB
PORTC
PORTD
PORTF
Power Saving Modes........................................................ 133
Power-Down Current (I
Power-up Timer
Program Address Space..................................................... 29
Program and EEPROM Characteristics............................ 159
Program Counter ................................................................ 20
Programmable .................................................................. 123
Programmer’s Model .......................................................... 20
Programming Operations.................................................... 51
Protection Against Accidental Writes to OSCCON ........... 128
R
Reader Response............................................................. 206
Reset ........................................................................ 123, 129
Reset Sequence ................................................................. 67
Reset Sources
Register Map for dsPIC30F2011/3012 ....................... 61
Register Map for dsPIC30F2012/3013 ....................... 61
Register Map for dsPIC30F2011/2012/3012/3013 ..... 61
Register Map for dsPIC30F2011/3012 ....................... 61
Register Map for dsPIC30F2012/3013 ....................... 62
Register Map for dsPIC30F2012/3013 ....................... 62
Idle............................................................................ 134
Sleep ........................................................................ 133
Sleep and Idle........................................................... 123
Timing Characteristics .............................................. 165
Timing Requirements ............................................... 165
Construction ............................................................... 31
Data Access from Program Memory Using
Data Access From Program Memory Using
Data Access from, Address Generation ..................... 31
Data Space Window into Operation ........................... 34
Data Table Access (LS Word) .................................... 32
Data Table Access (MS Byte) .................................... 33
Memory Maps............................................................. 30
Table Instructions
Diagram ...................................................................... 21
Algorithm for Program Flash....................................... 51
Erasing a Row of Program Memory ........................... 51
Initiating the Programming Sequence ........................ 52
Loading Write Latches................................................ 52
BOR, Programmable ................................................ 131
Brown-out Reset (BOR)............................................ 123
Oscillator Start-up Timer (OST)................................ 123
POR
POR (Power-on Reset)............................................. 129
Power-on Reset (POR)............................................. 123
Power-up Timer (PWRT) .......................................... 123
Reset Sources ............................................................ 67
Brown-out Reset (BOR).............................................. 67
Illegal Instruction Trap ................................................ 67
Program Space Visibility..................................... 33
Table Instructions ............................................... 32
TBLRDH ............................................................. 32
TBLRDL.............................................................. 32
TBLWTH............................................................. 32
TBLWTL ............................................................. 32
Operating without FSCM and PWRT................ 131
With Long Crystal Start-up Time ...................... 131
PD
)................................................ 154
DS70139G-page 203