MC9S12XDT512MAA Freescale Semiconductor, MC9S12XDT512MAA Datasheet - Page 863

IC MCU 512K FLASH 80-QFP

MC9S12XDT512MAA

Manufacturer Part Number
MC9S12XDT512MAA
Description
IC MCU 512K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT512MAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
80PQFP
Family Name
HCS12
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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22.3.2.51 Port H Polarity Select Register (PPSH)
Read: Anytime.
Write: Anytime.
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting
a pull-up or pull-down device if enabled.
22.3.2.52 Port H Interrupt Enable Register (PIEH)
Read: Anytime.
Write: Anytime.
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated with
Port H.
Freescale Semiconductor
PPSH[7:0]
PIEH[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
PPSH7
PIEH7
Polarity Select Port H
0 Falling edge on the associated port H pin sets the associated flag bit in the PIFH register.
1 Rising edge on the associated port H pin sets the associated flag bit in the PIFH register.
Interrupt Enable Port H
0 Interrupt is disabled (interrupt flag masked).
1 Interrupt is enabled.
0
0
7
7
A pull-up device is connected to the associated port H pin, if enabled by the associated bit in register PERH
and if the port is used as input.
A pull-down device is connected to the associated port H pin, if enabled by the associated bit in register PERH
and if the port is used as input.
PPSH6
PIEH6
0
0
6
6
Figure 22-54. Port H Interrupt Enable Register (PIEH)
Figure 22-53. Port H Polarity Select Register (PPSH)
Table 22-48. PPSH Field Descriptions
Table 22-49. PIEH Field Descriptions
PPSH5
MC9S12XDP512 Data Sheet, Rev. 2.21
PIEH5
0
0
5
5
PPSH4
PIEH4
0
0
4
4
Description
Description
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
PPSH3
PIEH3
0
0
3
3
PPSH2
PIEH2
0
0
2
2
PPSH1
PIEH1
0
0
1
1
PPSH0
PIEH0
0
0
0
0
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