MC912DG128ACPVER Freescale Semiconductor, MC912DG128ACPVER Datasheet - Page 283
![IC MCU 16BIT 8K FLASH 112-LQFP](/photos/12/21/122171/mc912dg128acpver_sml.jpg)
MC912DG128ACPVER
Manufacturer Part Number
MC912DG128ACPVER
Description
IC MCU 16BIT 8K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet
1.MC912DG128ACPVER.pdf
(478 pages)
Specifications of MC912DG128ACPVER
Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 8 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC912DG128ACPVERTR
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC912DG128ACPVER
Manufacturer:
STM
Quantity:
1 244
Company:
Part Number:
MC912DG128ACPVER
Manufacturer:
Freescale Semiconductor
Quantity:
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MC68HC912DT128A — Rev 4.0
MOTOROLA
LOOPS RSRC DDRS1(3) WOMS
0
1
1
1
1
1
1
0
0
0
1
1
1
x
0
1
1
0
1
1
x
RSRC — Receiver Source
M — Mode (select character format)
WAKE — Wake-up by Address Mark/Idle
ILT — Idle Line Type
When LOOPS = 1, the RSRC bit determines the internal feedback
path for the receiver.
Determines which of two types of idle line detection will be used by
the SCI receiver.
In the short mode, the SCI circuitry begins counting ones in the search
for the idle line condition immediately after the start bit. This means
that the stop bit and any bits that were ones before the stop bit could
be counted in that string of ones, resulting in earlier recognition of an
idle line.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Receiver input is connected to the transmitter internally (not
1 = Receiver input is connected to the TXD pin
0 = One start, eight data, one stop bit
1 = One start, eight data, ninth data, one stop bit
0 = Wake up by IDLE line recognition
1 = Wake up by address mark (last data bit set)
0 = Short idle line mode is enabled.
1 = Long idle line mode is detected.
0/1
Table 16-2. Loop Mode Functions
1
1
0
1
x
x
TXD pin)
Normal Operations
LOOP mode without TXD output(TXD = High Impedance)
LOOP mode with TXD output (CMOS)
LOOP mode with TXD output (open-drain)
Single wire mode without TXD output
Single wire mode with TXD output
Single wire mode for the receiving and transmitting(open-drain)
Go to: www.freescale.com
(the pin is used as receiver input only, TXD = High Impedance)
(the output is also fed back to receiver input, CMOS)
Multiple Serial Interface
Function of Port S Bit 1/3
Serial Communication Interface (SCI)
Multiple Serial Interface
Technical Data
283
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