MC912DG128ACPVER Freescale Semiconductor, MC912DG128ACPVER Datasheet - Page 237
![IC MCU 16BIT 8K FLASH 112-LQFP](/photos/12/21/122171/mc912dg128acpver_sml.jpg)
MC912DG128ACPVER
Manufacturer Part Number
MC912DG128ACPVER
Description
IC MCU 16BIT 8K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet
1.MC912DG128ACPVER.pdf
(478 pages)
Specifications of MC912DG128ACPVER
Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 8 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC912DG128ACPVERTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC912DG128ACPVER
Manufacturer:
STM
Quantity:
1 244
Company:
Part Number:
MC912DG128ACPVER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- Current page: 237 of 478
- Download datasheet (4Mb)
PWCTL — PWM Control Register
MC68HC912DT128A — Rev 4.0
MOTOROLA
RESET:
Bit 7
0
0
6
0
0
Read and write anytime.
PSWAI — PWM Halts while in Wait Mode
CENTR — Center-Aligned Output Mode
RDPP — Reduced Drive of Port P
PUPP — Pull-Up Port P Enable
PSBCK — PWM Stops while in Background Mode
To avoid irregularities in the PWM output mode, write the CENTR bit
only when PWM channels are disabled.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Allows PWM main clock generator to continue while in wait
1 = Halt PWM main clock generator when the part is in wait mode.
0 = PWM channels operate in left-aligned output mode
1 = PWM channels operate in center-aligned output mode
0 = All port P output pins have normal drive capability.
1 = All port P output pins have reduced drive capability.
0 = All port P pins have an active pull-up device disabled.
1 = All port P pins have an active pull-up device enabled.
0 = Allows PWM to continue while in background mode.
1 = Disable PWM input clock when the part is in background mode.
5
0
0
mode.
Go to: www.freescale.com
Pulse Width Modulator
PSWAI
4
0
CENTR
3
0
RDPP
2
0
PUPP
1
0
PWM Register Descriptions
Pulse Width Modulator
PSBCK
Bit 0
0
Technical Data
$0054
237
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